Inventor
Shriram SHIVARAMAN
Inventor
US
Overview
Patents· 45 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices29%
H01LSemiconductor devices28%
H10BElectronic memory devices20%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%
H10NElectric solid-state devices not otherwise provided for5%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
B82YSpecific uses or applications of nanostructures4%
G11CStatic stores1%
H01GCapacitors1%
PatentTitleYear
12,575,111Back-end-of-line 2D memory cell202612,396,217Encapsulation for transition metal dichalcogenide nanosheet transistor and methods of fabrication202512,396,254Stacked 2D CMOS with inter metal layers202512,349,416Transistor structures with a metal oxide contact buffer and a method of fabricating the transistor structures202512,349,438Contact gating for 2D field effect transistors202512,310,101Gate dielectrics for complementary metal oxide semiconductors transistors and methods of fabrication202512,278,289TMD inverted nanowire integration202512,266,720Transistors with monocrystalline metal chalcogenide channel materials202512,266,729Angled etch to enable tin removal from selected sidewalls202512,191,395Dual gate control for trench shaped thin film transistors202512,183,831Self-aligned contacts for thin film transistors202412,176,388Transition metal dichalcogenide nanowires and methods of fabrication202412,166,122Field-effect transistor (FET) with self-aligned ferroelectric capacitor and methods of fabrication202412,125,895Transition metal dichalcogenide (TMD) layer stack for transistor applications and methods of fabrication202412,119,409Multi-layer crystalline back gated thin film transistor202412,048,165Ferroelectric capacitors and methods of fabrication202412,009,433Multi-dielectric gate stack for crystalline thin film transistors202411,997,847Thin film transistors with spacer controlled gate length202411,980,037Memory cells with ferroelectric capacitors separate from transistor gate stacks202411,935,956TMD inverted nanowire integration202411,908,950Charge-transfer spacers for stacked nanoribbon 2D transistors202411,862,728Dual gate control for trench shaped thin film transistors202411,843,054Vertical architecture of thin film transistors202311,843,058Transistor structures with a metal oxide contact buffer and a method of fabricating the transistor structures202311,764,306Multi-layer crystalline back gated thin film transistor202311,742,407Multilayer high-k gate dielectric for a high performance logic transistor202311,721,735Thin film transistors having U-shaped features202311,690,215Self-aligned bitline and capacitor via formation202311,658,222Thin film transistor with charge trap layer202311,653,502FeFET with embedded conductive sidewall spacers and process for forming the same202311,588,102Semiconductor material for resistive random access memory202311,527,656Contact electrodes for vertical thin-film transistors202211,522,060Epitaxial layers on contact electrodes for thin- film transistors202211,450,750Thin-film transistors with vertical channels202211,417,775Nanowire thin film transistors with textured semiconductors202211,417,770Vertical thin-film transistors between metal layers202211,398,560Contact electrodes and dielectric structures for thin film transistors202211,387,366Encapsulation layers of thin film transistors202211,380,797Thin film core-shell fin and nanowire transistors202211,348,973Threshold switching selector based memory202211,296,087Thin film transistors with spacer controlled gate length202211,296,229Vertical thin film transistors having self-aligned contacts202211,264,512Thin film transistors having U-shaped features202211,183,594Dual gate control for trench shaped thin film transistors202111,152,514Multi-layer crystalline back gated thin film transistor2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2026Patents assigned to INTEL CORP (45)· patent assignee history
2021–2026Based in US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 45 | 2021–2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 45 | 2021–2026 |