Inventor
PRADEEP M. PAPPACHAN
Inventor
US
Overview
Patents· 28 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing42%
H04LTransmission of digital information, e.g. telegraphic communication39%
H04WWireless communication networks9%
G06TImage data processing or generation, in general6%
G09CCiphering or deciphering apparatus for cryptographic or other purposes involving the need for secrecy3%
PatentTitleYear
12,554,619Systems and methods for implementing a trusted multiparty build process using confidential computing202612,399,840Technologies for secure I/O with accelerator devices202512,361,145Trusted local memory management in a virtualized GPU202512,284,286Integrity protected command buffer execution202512,204,662Protection of communications between trusted execution environment and hardware accelerator utilizing enhanced end-to-end encryption and inter-context security202512,189,542Technologies for secure device configuration and management202512,174,754Technologies for secure I/O with memory encryption engines202412,135,801Technologies for trusted I/O protection of I/O data with header information202412,050,702Trusted local memory management in a virtualized GPU202411,848,753Securing audio communications202311,836,272Protection of privacy and data on smart edge devices202311,836,262Protection of communications between trusted execution environment and hardware accelerator utilizing enhanced end-to-end encryption and inter-context security202311,755,748Trusted local memory management in a virtualized GPU202311,741,230Technologies for secure hardware and software attestation for trusted I/O202311,665,144Session management framework for secure communications between host devices and trusted devices202311,630,904System, apparatus and method for configurable trusted input/output access from authorized software202311,625,275Technologies for controlling memory access transactions received from one or more I/O devices202311,575,672Secure accelerator device pairing for trusted accelerator-to-accelerator communication202311,531,770Trusted local memory management in a virtualized GPU202211,496,314Integrity protected command buffer execution202211,461,483Protection of communications between trusted execution environment and hardware accelerator utilizing enhanced end-to-end encryption and inter-context security202211,423,159Technologies for trusted I/O protection of I/O data with header information202211,423,171Protection of privacy and data on smart edge devices202211,416,415Technologies for secure device configuration and management202211,349,817Session management framework for secure communications between host devices and trusted devices202211,228,420Securing audio communications202211,157,623Technologies for secure hardware and software attestation for trusted I/O202111,138,132Technologies for secure I/O with accelerator devices2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2025Patents assigned to INTEL CORP (27)· patent assignee history
2021–2026Based in US· patent location history
2026Patents assigned to BOSCH GMBH ROBERT (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 27 | 2021–2025 |
| BOSCH GMBH ROBERT | 1 | 2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 28 | 2021–2026 |