Inventor
Hans-Werner Tast
Inventor
Weil am Rhein, DE
Overview
Patents· 42 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing84%
G11CStatic stores7%
G01RMeasuring electric variables2%
H04JMultiplex communication2%
H04LTransmission of digital information, e.g. telegraphic communication2%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use2%
PatentTitleYear
9,886,395'Evicting cached stores'20189,665,486'Hierarchical cache structure and handling thereof'20179,658,967'Evicting cached stores'20179,588,894'Store cache for transactional memory'20179,588,893'Store cache for transactional memory'20179,563,568'Hierarchical cache structure and handling thereof'20179,384,131'Systems and methods for accessing cache memory'20169,378,143'Managing transactional and non-transactional store observability'20169,323,673'Hierarchical cache structure and handling thereof'20169,298,631'Managing transactional and non-transactional store observability'20169,274,959'Handling virtual memory address synonyms in a multi-level cache hierarchy structure'20169,183,146'Hierarchical cache structure and handling thereof'20159,075,732'Data caching method'20158,977,823'Store buffer for transactional memory'20158,891,279'Enhanced wiring structure for a cache supporting auxiliary data output'20148,856,444'Data caching method'20148,751,749'Data caching method'20148,516,200'Avoiding cross-interrogates in a streaming data optimized L1 cache'20138,495,452'Handling corrupted background data in an out of order execution environment'20138,302,043'Verification of logic circuit designs using dynamic clock gating'20128,108,197'Method to verify an implemented coherency algorithm of a multi processor environment'20128,082,399'Cache bounded reference counting'20118,041,894'Method and system for a multi-level virtual/real cache system with synonym resolution'20118,015,451'Controlling an unreliable data transfer in a data channel'20118,001,411'Generating a local clock domain using dynamic controls'20117,987,384'Method, system, and computer program product for handling errors in a cache without processor core recovery'20117,783,690'Electronic circuit for implementing a permutation operation'20107,552,286'Performance of a cache by detecting cache lines that have been reused'20097,469,332'Systems and methods for adaptively mapping an instruction cache'20087,380,065'Performance of a cache by detecting cache lines that have been reused'20086,968,476'Checkpointing a superscalar, out-of-order processor for error recovery'20056,681,313'Method and system for fast access to a translation lookaside buffer'20046,518,793'Embedding of dynamic circuits in a static environment'20036,353,548'Method and data processing system for data lookups'20026,108,771'Register renaming with a pool of physical registers'20006,032,233'Storage array allowing for multiple, simultaneous write accesses'20005,974,543'Apparatus and method for performing subroutine call and return operations'19995,872,944'Bus with request-dependent matching of the bandwidth available in both directions'19995,870,601'Data processing apparatus and method for correcting faulty microcode in a ROM device via a flag microinstruction in a RAM device including corrected microcode'19995,761,734'Token-based serialisation of instructions in a multiprocessor system'19985,634,047'Method for executing branch instructions by processing loop end conditions in a second processor'19975,311,519'Multiplexer'1994Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1994–2018Patents assigned to IBM (40)· patent assignee history
1994–2000Based in Weil im Schonbuch, DE· patent location history
1997–2018Based in Weil am Rhein, DE· patent location history
2011–2016Patents assigned to TAST HANS-WERNER (9)· patent assignee history
2011–2015Based in Boeblingen, DE· patent location history
2011Based in Shoenbuch, DE· patent location history
2012–2015Patents assigned to HABERMANN CHRISTIAN (7)· patent assignee history
2012–2016Patents assigned to JACOBI CHRISTIAN (5)· patent assignee history
2012Based in Boblingen, DE· patent location history
2013–2015Patents assigned to RECKTENWALD MARTIN (5)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 40 | 1994–2018 |
| TAST HANS-WERNERself | 9 | 2011–2016 |
| HABERMANN CHRISTIAN | 7 | 2012–2015 |
| JACOBI CHRISTIAN | 5 | 2012–2016 |
| RECKTENWALD MARTIN | 5 | 2013–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Weil am Rhein, DE | 32 | 1997–2018 |
| Boeblingen, DE | 4 | 2011–2015 |
| Weil im Schonbuch, DE | 4 | 1994–2000 |
| Boblingen, DE | 1 | 2012 |
| Shoenbuch, DE | 1 | 2011 |