Inventor

Akash R. Deshpande

Inventor
San Jose, CA, US

Overview

22→
Patents
2006–2021
Patent span
Physics
Primary field (CPC G)

Patents· 22 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing55%
G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes17%
H04LTransmission of digital information, e.g. telegraphic communication17%
G06NComputing arrangements based on specific computational models7%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3%
PatentTitleYear
10,956,850Causal performance analysis approach for store merchandizing analysis202110,937,084Tracking business performance impact of optimized sourcing algorithms202110,929,808Estimation of node processing capacity for order fulfillment202110,915,854System and method to incorporate customized capacity utilization cost in balancing fulfillment load across retail supply networks202110,902,373System, method and computer program product for order fulfillment in retail supply networks20219,952,877Booting a physical device using custom-created frozen partially-booted virtual machines20189,690,630'Hardware accelerator test harness generation'20179,596,175'Virtual machines in a packet switching device'20179,460,034'Structured block transfer module, system architecture, and method for transferring'20169,430,427'Structured block transfer module, system architecture, and method for transferring'20169,185,030'Virtual machines in a packet switching device'20159,020,894'Service version modification of a high-availability system'20159,003,166'Generating hardware accelerators and processor offloads'20158,706,987'Structured block transfer module, system architecture, and method for transferring'20148,289,966'Packet ingress/egress block and system and method for receiving, transmitting, and managing packetized data'20128,127,113'Generating hardware accelerators and processor offloads'20127,805,724'Apparatus, method and computer program for dynamic slip control in real-time scheduling'20107,451,447'Method, computer program and apparatus for operating system dynamic event management and task scheduling using function calls'20087,320,044'System, method, and computer program product for interrupt scheduling in processing communication'20087,130,936'System, methods, and computer program product for shared memory queue'20067,039,772'System, method, and computer program product for processing reflective state machines'20066,985,976'System, method, and computer program product for memory management for defining class lists and node lists for allocation and deallocation of memory blocks'2006

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2006–2018Based in San Jose, CA, US· patent location history
2012–2017Patents assigned to SYNOPSYS INC (7)· patent assignee history
2012–2015Patents assigned to ATTIAS ROBERTO (4)· patent assignee history
2015–2018Patents assigned to CISCO TECH INC (4)· patent assignee history
2015–2018Patents assigned to DESHPANDE AKASH R (4)· patent assignee history
2021Patents assigned to IBM (5)· patent assignee history
2021Based in White Plains, NY, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SYNOPSYS INC72012–2017
IBM52021
ATTIAS ROBERTO42012–2015
CISCO TECH INC42015–2018
DESHPANDE AKASH Rself42015–2018
Locations
LocationPatentsSpan
San Jose, California, US172006–2018
White Plains, New York, US52021