Inventor
Deepak Chandra PANDEY
Inventor
IN
Overview
Patents· 15 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices28%
H01LSemiconductor devices25%
H10DInorganic electric semiconductor devices25%
G11CStatic stores8%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h106%
B82YSpecific uses or applications of nanostructures2%
PatentTitleYear
12,219,758Integrated assemblies having transistor body regions coupled to carrier-sink-structures; and methods of forming integrated assemblies202512,166,072Channel conduction in semiconductor devices202412,119,269Array of vertical transistors having channel regions connected by an elongated conductor line202411,910,597Integrated assemblies having transistor body regions coupled to carrier-sink-structures; and methods of forming integrated assemblies202411,769,795Channel conduction in semiconductor devices202311,569,353Apparatuses including passing word lines comprising a band offset material, and related methods and systems202311,538,809Metal insulator semiconductor (MIS) contact in three dimensional (3D) vertical memory202211,527,620Integrated assemblies having polycrystalline first semiconductor material adjacent conductively-doped second semiconductor material202211,515,311Semiconductor structure formation at differential depths202211,430,793Microelectronic devices including passing word line structures, and related electronic systems and methods202211,393,928Access devices formed with conductive contacts202211,373,913Method of forming an array of vertical transistors202211,348,932Integrated assemblies having transistor body regions coupled to carrier-sink-structures; and methods of forming integrated assemblies202211,195,560Integrated assemblies having void regions between digit lines and conductive structures, and methods of forming integrated assemblies202111,177,265Integrated assemblies having threshold-voltage-inducing-structures proximate gated-channel-regions, and methods of forming integrated assemblies2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2025Patents assigned to MICRON TECHNOLOGY INC (14)· patent assignee history
2021–2025Based in IN· patent location history
2022Based in US· patent location history
2024Patents assigned to LODESTAR LICENSING GROUP LLC (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 14 | 2021–2025 |
| LODESTAR LICENSING GROUP LLC | 1 | 2024 |
Locations
| Location | Patents | Span |
|---|---|---|
| IN | 14 | 2021–2025 |
| US | 1 | 2022 |