LexDanaLexDanabeta
Inventor

Alan B. Botula

Inventor
Essex Junction, VT, US

Overview

55→
Patents
2002–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 55 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices30%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1022%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1022%
H01LSemiconductor devices16%
B82YSpecific uses or applications of nanostructures5%
G06FElectric digital data processing2%
G01RMeasuring electric variables1%
H01PWaveguides1%
H03FAmplifiers1%
H03KPulse technique1%
PatentTitleYear
11,081,572Integrated circuit heat dissipation using nanostructures202110,629,710Integrated circuit heat dissipation using nanostructures202010,600,893Integrated circuit heat dissipation using nanostructures202010,109,553Integrated circuit heat dissipation using nanostructures201810,068,827Integrated circuit heat dissipation using nanostructures20189,978,849SOI-MOSFET gate insulation layer with different thickness20189,847,415Field effect transistor and method of manufacture20179,704,978'Integrated circuit heat dissipation using nanostructures'20179,666,701'Integrated circuit heat dissipation using nanostructures'20179,601,606'Integrated circuit heat dissipation using nanostructures'20179,530,711'Silicon-on-insulator heat sink'20169,472,570'Diode biased body contacted transistor'20169,324,628'Integrated circuit heat dissipation using nanostructures'20169,257,324'Forming structures on resistive substrates'20169,214,561'Thin body switch transistor'20159,165,819'High linearity SOI wafer for low-distortion circuit applications'20159,070,651'Non-linear kerf monitor and design structure thereof'20159,059,269'Silicon-on-insulator heat sink'20158,963,293'High resistivity silicon-on-insulator substrate and method of forming'20158,951,896'High linearity SOI wafer for low-distortion circuit applications'20158,921,190'Field effect transistor and method of manufacture'20148,916,467'SOI radio frequency switch with enhanced signal fidelity and electrical isolation'20148,912,597'Semiconductor device including asymmetric lightly doped drain (LDD) region, related method and design structure'20148,901,676'Lateral extended drain metal oxide semiconductor field effect transistor (LEDMOSFET) having a high drain-to-body breakdown voltage (Vb), a method of forming an LEDMOSFET, and a silicon-controlled rectifier (SCR) incorporating a complementary pair of LEDMOSFETs'20148,890,246'Shielding for high-voltage semiconductor-on-insulator devices'20148,866,226'SOI radio frequency switch with enhanced electrical isolation'20148,828,746'Compensation for a charge in a silicon substrate'20148,748,285'Noble gas implantation region in top silicon layer of semiconductor-on-insulator substrate'20148,741,739'High resistivity silicon-on-insulator substrate and method of forming'20148,735,986'Forming structures on resistive substrates'20148,722,508'Low harmonic RF switch in SOI'20148,709,903'Silicon-on-insulator (SOI) structure configured for reduced harmonics and method of forming the structure'20148,698,244'Silicon-on-insulator (SOI) structure configured for reduced harmonics, design structure and method'20148,674,472'Low harmonic RF switch in SOI'20148,564,067'Silicon-on-insulator (SOI) structure configured for reduced harmonics and method of forming the structure'20138,536,035'Silicon-on-insulator substrate and method of forming'20138,518,782'Semiconductor device including asymmetric lightly doped drain (LDD) region, related method and design structure'20138,492,868'Method, apparatus, and design structure for silicon-on-insulator high-bandwidth circuitry with reduced charge layer'20138,482,067'Lateral extended drain metal oxide semiconductor field effect transistor (LEDMOSFET) with tapered dielectric plates to achieve a high drain-to-body breakdown voltage, a method of forming the transistor and a program storage device for designing the transistor'20138,471,340'Silicon-on-insulator (SOI) structure configured for reduced harmonics and method of forming the structure'20138,299,558'Self-aligned Schottky diode'20128,299,547'Lateral extended drain metal oxide semiconductor field effect transistor (LEDMOSFET) with tapered dielectric plates'20128,299,561'Shielding for high-voltage semiconductor-on-insulator devices'20128,288,821'SOI (silicon on insulator) substrate improvements'20128,133,774'SOI radio frequency switch with enhanced electrical isolation'20128,131,225'BIAS voltage generation circuit for an SOI radio frequency switch'20128,089,126'Method and structures for improving substrate loss and linearity in SOI substrates'20128,026,131'SOI radio frequency switch for reducing high frequency harmonics'20118,021,943'Simultaneously formed isolation trench and through-box contact for silicon-on-insulator technology'20118,008,142'Self-aligned Schottky diode'20117,999,320'SOI radio frequency switch with enhanced signal fidelity and electrical isolation'20117,772,083'Trench forming method and structure'20107,477,497'Apparatus for electrostatic discharge protection of bipolar emitter follower circuits'20096,549,061'Electrostatic discharge power clamp circuit'20036,429,489'Electrostatic discharge power clamp circuit'2002

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2002–2021Patents assigned to IBM (54)· patent assignee history
2002–2021Based in Essex Junction, VT, US· patent location history
2012–2015Patents assigned to BOTULA ALAN B (21)· patent assignee history
2012–2015Patents assigned to JOSEPH ALVIN J (16)· patent assignee history
2012–2014Patents assigned to SLINKMAN JAMES A (10)· patent assignee history
2012–2014Patents assigned to SHI YUN (9)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
IBM542002–2021
BOTULA ALAN Bself212012–2015
JOSEPH ALVIN J162012–2015
SLINKMAN JAMES A102012–2014
SHI YUN92012–2014
Locations
LocationPatentsSpan
Essex Junction, VT, US552002–2021