Inventor
Joseph Anthony DeSantis
Inventor
Gilroy, CA, US
Overview
Patents· 4 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices25%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1025%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1025%
H01LSemiconductor devices17%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests8%
PatentTitleYear
10,770,538Method and structure for dual sheet resistance trimmable thin film resistors20209,991,329Method and structure for dual sheet resistance trimmable thin film resistors at same level20188,298,901'Method for manufacturing bipolar transistors'20125,811,315'Method of forming and planarizing deep isolation trenches in a silicon-on-insulator (SOI) structure'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–2012Patents assigned to NAT SEMICONDUCTOR CORP (2)· patent assignee history
1998–2012Based in San Jose, CA, US· patent location history
2012Patents assigned to DESANTIS JOSEPH A (1)· patent assignee history
2012Patents assigned to FOOTE RICHARD W (1)· patent assignee history
2012Patents assigned to KNORR CHRISTOHER J (1)· patent assignee history
2018–2020Patents assigned to TEXAS INSTRUMENTS INC (2)· patent assignee history
2018–2020Based in Gilroy, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NAT SEMICONDUCTOR CORP | 2 | 1998–2012 |
| TEXAS INSTRUMENTS INC | 2 | 2018–2020 |
| DESANTIS JOSEPH Aself | 1 | 2012 |
| FOOTE RICHARD W | 1 | 2012 |
| KNORR CHRISTOHER J | 1 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Gilroy, California, US | 2 | 2018–2020 |
| San Jose, California, US | 2 | 1998–2012 |