Inventor
STEVEN LEMKE
Inventor
US
Overview
Patents· 33 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores27%
G06NComputing arrangements based on specific computational models26%
H10BElectronic memory devices12%
H10DInorganic electric semiconductor devices12%
G06FElectric digital data processing11%
H01LSemiconductor devices10%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h101%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h101%
PatentTitleYear
12,535,966System and method for implementing temperature compensation in a memory device202612,354,651Neural network classifier using array of three-gate non-volatile memory cells202512,283,314Neural network classifier using array of three-gate non-volatile memory cells202512,249,368Neural network classifier using array of three-gate non-volatile memory cells202512,205,655Testing of analog neural memory cells in an artificial neural network202512,200,926Input function circuit block and output neuron circuit block coupled to a vector-by-matrix multiplication array in an artificial neural network202512,176,039Setting levels for a programming operation in a neural network array202412,131,786Memory cell array with row direction gap between erase gate lines and dummy floating gates202412,124,944Precise data tuning method and apparatus for analog neural memory in an artificial neural network202412,056,601Circuitry to compensate for data drift in analog neural memory in an artificial neural network202412,057,170Neural network array comprising one or more coarse cells and one or more fine cells202412,033,692Neural network classifier using array of three-gate non-volatile memory cells202411,915,747Precision tuning of a page or word of non-volatile memory cells in an analog neural memory system202411,847,556Precise data tuning method and apparatus for analog neural memory in an artificial neural network202311,798,619Precision tuning of a page or word of non-volatile memory cells in an analog neural memory system202311,783,904Compensation for leakage in an array of analog neural memory cells in an artificial neural network202311,755,899Precise programming method and apparatus for analog neural memory in an artificial neural network202311,729,970Input and digital output mechanisms for analog neural memory in a deep learning artificial neural network202311,682,459Analog neural memory array in artificial neural network comprising logical cells and improved programming mechanism202311,646,075Neural network classifier using array of three-gate non-volatile memory cells202311,636,322Precise data tuning method and apparatus for analog neural memory in an artificial neural network202311,532,354Precision tuning of a page or word of non-volatile memory cells and associated high voltage circuits for an analog neural memory array in an artificial neural network202211,521,682Temperature compensation in an analog memory array by changing a threshold voltage of a selected memory cell in the array202211,507,816Precision tuning for the programming of analog neural memory in a deep learning artificial neural network202211,482,530Precision tuning for the programming of analog neural memory in a deep learning artificial neural network202211,449,741Testing circuitry and methods for analog neural memory in artificial neural network202211,393,535Ultra-precise tuning of analog neural memory cells in a deep learning artificial neural network202211,393,546Testing circuitry and methods for analog neural memory in artificial neural network202211,362,100FinFET split gate non-volatile memory cells with enhanced floating gate to floating gate capacitive coupling202211,270,763Neural network classifier using array of three-gate non-volatile memory cells202211,270,771Neural network classifier using array of stacked gate non-volatile memory cells202211,183,506Method of making embedded memory device with silicon-on-insulator substrate202111,158,374Temperature compensation for memory cells in an analog neural memory system used in a deep learning neural network2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2026Patents assigned to SILICON STORAGE TECH INC (33)· patent assignee history
2021–2026Based in US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SILICON STORAGE TECH INC | 33 | 2021–2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 33 | 2021–2026 |