Inventor
Cem Basceri
Inventor
Boise, ID, US
Overview
Patents· 267 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices25%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1019%
C23CCoating metallic material12%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1010%
H10BElectronic memory devices8%
H01LSemiconductor devices7%
C30BSingle-crystal growth5%
H10HInorganic light-emitting semiconductor devices having potential barriers4%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3%
Y10TTechnical subjects covered by former us classification2%
PatentTitleYear
11,121,120Method and system for electronic devices with polycrystalline substrate structure interposer202111,121,244RF device integrated on an engineered substrate202111,107,720Methods of manufacturing vertical semiconductor diodes using an engineered substrate202111,037,918Back-to-back solid state lighting devices and associated methods202111,011,373Engineered substrate structures for power and RF applications202110,964,535Polycrystalline ceramic substrate and method of manufacture202110,930,576Gallium-nitride based devices implementing an engineered substrate structure202110,910,258Engineered substrate structure and method of manufacture202110,903,403LED array package202110,811,397Chip-on-board design with color mixing202010,763,109Methods of manufacturing engineered substrate structures for power and RF applications202010,763,299Wide band gap device integrated circuit architecture on engineered substrate202010,763,110Method and system for forming doped regions by diffusion gallium nitride materials202010,755,986Aluminum nitride based Silicon-on-Insulator substrate structure202010,734,303Power and RF devices implemented using an engineered substrate structure202010,679,852Multi-deposition process for high quality gallium nitride device manufacturing202010,655,243Growth of epitaxial gallium nitride material using a thermally matched substrate202010,622,468RF device integrated on an engineered substrate202010,573,516Methods for integrated devices on an engineered substrate202010,566,190Polycrystalline ceramic substrate202010,535,547Methods of forming a vertical semiconductor diode using an engineered substrate202010,529,613Electronic power devices integrated with an engineered substrate202010,510,577Lift off process for chip scale package solid state devices on engineered substrate201910,510,582Engineered substrate structure201910,438,792Methods for integration of elemental and compound semiconductors on a ceramic substrate201910,431,714Engineered substrates for semiconductor devices and associated systems and methods201910,403,607Chip-on-board design with color mixing201910,395,965Electronic power devices integrated with an engineered substrate201910,297,445Engineered substrate structure for power and RF applications201910,290,674Engineered substrate including light emitting diode and power circuitry201910,205,069LED array package201910,181,419Vertical semiconductor diode manufactured with an engineered substrate201910,141,371Wide band gap device integrated circuit device201810,134,589Polycrystalline ceramic substrate and method of manufacture201810,074,567Method and system for vertical integration of elemental and compound semiconductors201810,062,677Back-to-back solid state lighting devices and associated methods20189,997,391Lift off process for chip scale package solid state devices on engineered substrate20189,768,271'Methods, devices, and systems related to forming semiconductor power devices with a handle substrate'20179,620,675'Solid state lighting devices with reduced crystal lattice dislocations and associated methods of manufacturing'20179,620,670'Solid state lighting dies with quantum emitters and associated methods of manufacturing'20179,577,058'Devices, systems, and methods related to removing parasitic conduction in semiconductor devices'20179,530,927'Light emitting devices with built-in chromaticity conversion and methods of manufacturing'20169,443,834'Back-to-back solid state lighting devices and associated methods'20169,269,858'Engineered substrates for semiconductor devices and associated systems and methods'20169,246,051'Solid state lighting devices with reduced crystal lattice dislocations and associated methods of manufacturing'20169,184,336'Light emitting devices with built-in chromaticity conversion and methods of manufacturing'20159,105,701'Semiconductor devices having compact footprints'20159,099,377'Micropipe-free silicon carbide and related method of manufacture'20159,082,748'Devices, systems, and methods related to removing parasitic conduction in semiconductor devices'20158,847,198'Light emitting devices with built-in chromaticity conversion and methods of manufacturing'20148,786,005'One-transistor composite-gate memory'20148,728,840'Solid state lighting devices with reduced crystal lattice dislocations and associated methods of manufacturing'20148,691,015'Method and system for binding halide-based contaminants'20148,664,664'Silicon carbide dimpled substrate'20148,518,184'Methods and systems for controlling temperature during microfeature workpiece processing, E.G., CVD deposition'20138,435,886'Method and system for binding halide-based contaminants'20138,409,933'Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects'20138,410,488'Micropipe-free silicon carbide and related method of manufacture'20138,384,192'Methods for forming small-scale capacitor structures'20138,263,988'Solid state lighting devices with reduced crystal lattice dislocations and associated methods of manufacturing'20128,227,313'One-transistor composite-gate memory'20128,216,377'Method and system for binding halide-based contaminants'20128,207,563'Integrated circuitry'20128,084,142'Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects'2011RE043025'Mixed composition interface layer and method of forming'20118,035,129'Integrated circuitry'20118,011,296'Supercritical fluid-assisted direct write for printing integrated circuits'20117,947,597'Methods of titanium deposition'20117,922,818'Method and system for binding halide-based contaminants'20117,923,308'Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects'20117,906,393'Methods for forming small-scale capacitor structures'20117,846,798'Methods of forming vertical transistor structures'20107,794,787'Methods of depositing materials over substrates, and methods of forming layers over substrates'20107,771,537'Methods and systems for controlling temperature during microfeature workpiece processing, E.G. CVD deposition'20107,767,525'Methods of forming vertical transistor structures'20107,768,092'Semiconductor device comprising a junction having a plurality of rings'20107,768,036'Integrated circuitry'20107,751,228'Dielectric relaxation memory'20107,741,175'Methods of forming capacitors'20107,728,403'Semiconductor device'20107,700,480'Methods of titanium deposition'20107,699,932'Reactors, systems and methods for depositing thin films onto microfeature workpieces'20107,687,358'Methods of forming a gated device'20107,647,886'Systems for depositing material onto workpieces in reaction chambers and methods for removing byproducts from reaction chambers'20107,648,873'Methods of forming capacitors'20107,633,116'One-transistor composite-gate memory'20097,618,890'Methods for forming conductive structures and structures regarding same'20097,611,971'Method of removing residual contaminants from an environment'20097,585,728'Methods of programming memory cells using manipulation of oxygen vacancies'20097,572,710'Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects'20097,557,006'Methods of forming field effect transistors'20097,550,345'Methods of forming hafnium-containing materials'20097,547,617'Semiconductor device including container having epitaxial silicon therein'20097,544,388'Methods of depositing materials over substrates, and methods of forming layers over substrates'20097,535,695'DRAM cells and electronic systems'20097,531,395'Methods of forming a layer comprising epitaxial silicon, and methods of forming field effect transistors'20097,528,424'Integrated circuitry'20097,517,758'Method of forming a vertical transistor'20097,498,057'Deposition methods'20097,488,514'Methods of forming barium strontium titanate layers'20097,485,512'Method of manufacturing an adaptive AIGaN buffer layer'20097,482,239'Methods of forming integrated circuitry'20097,457,184'Dielectric relaxation memory'20087,453,115'Dielectric relaxation memory'20087,444,934'Supercritical fluid-assisted direct write for printing integrated circuits'20087,442,977'Gated field effect devices'20087,439,136'Method of forming a layer comprising epitaxial silicon'20087,436,067'Methods for forming conductive structures and structures regarding same'20087,422,635'Methods and apparatus for processing microfeature workpieces, e.g., for depositing materials on microfeature workpieces'20087,414,297'Capacitor constructions'20087,411,254'Semiconductor substrate'20087,399,499'Methods of gas delivery for deposition processes and methods of depositing material on a substrate'20087,396,570'Plasma enhanced chemical vapor deposition method of forming titanium silicide comprising layers'20087,393,563'Plasma enhanced chemical vapor deposition method of forming titanium silicide comprising layers'20087,390,712'Methods of enhancing capacitors in integrated circuits'20087,388,248'Dielectric relaxation memory'20087,378,354'Atomic layer deposition methods'20087,374,993'Methods of forming capacitors'20087,368,382'Atomic layer deposition methods'20087,368,381'Methods of forming materials'20087,364,988'Method of manufacturing gallium nitride based high-electron mobility devices'20087,358,554'Semiconductor manufacturing apparatus for modifying-in-film stress of thin films, and product formed thereby'20087,358,188'Method of forming conductive metal silicides by reaction of metal with silicon'20087,355,223'Vertical junction field effect transistor having an epitaxial gate'20087,352,023'Constructions comprising hafnium oxide'20087,344,755'Methods and apparatus for processing microfeature workpieces; methods for conditioning ALD reaction chambers'20087,329,573'Methods of forming capacitors'20087,326,971'Gallium nitride based high-electron mobility devices'20087,326,984'MIS capacitor and method of formation'20087,323,064'Supercritical fluid technology for cleaning processing chambers and systems'20087,323,738'MIS capacitor and method of formation'20087,323,737'DRAM constructions and electronic systems'20087,320,911'Methods of forming pluralities of capacitors'20087,311,942'Method for binding halide-based contaminants during formation of a titanium-based film'20077,309,889'Constructions comprising perovskite-type dielectric'20077,303,991'Atomic layer deposition methods'20077,279,368'Method of manufacturing a vertical junction field effect transistor having an epitaxial gate'20077,279,398'Microfeature workpiece processing apparatus and methods for controlling deposition of materials on microfeature workpieces'20077,276,416'Method of forming a vertical transistor'20077,276,117'Method of forming semi-insulating silicon carbide single crystal'20077,273,660'Mixed composition interface layer and method of forming'20077,274,059'Capacitor constructions'20077,274,061'Capacitor constructions'20077,273,791'Methods for forming a conductive structure using oxygen diffusion through one metal layer to oxidize a second metal layer'20077,271,077'Deposition methods with time spaced and time abutting precursor pulses'20077,268,034'Methods of forming pluralities of capacitors, and integrated circuitry'20077,268,388'One-transistor composite-gate memory'20077,262,099'Methods of forming field effect transistors'20077,258,892'Methods and systems for controlling temperature during microfeature workpiece processing, e.g., CVD deposition'20077,259,066'One-transistor composite-gate memory'20077,253,102'Methods for forming and integrated circuit structures containing enhanced-surface-area conductive layers'20077,253,085'Deposition methods'20077,253,076'Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers'20077,247,561'Method of removing residual contaminants from an environment'20077,241,705'Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects'20077,235,138'Microfeature workpiece processing apparatus and methods for batch deposition of materials on microfeature workpieces'20077,232,721'Structures and methods for enhancing capacitors in integrated circuits'20077,217,617'Methods of forming a capacitor'20077,217,630'Methods of forming hafnium oxide'20077,208,198'Chemical vapor deposition methods of forming barium strontium titanate comprising dielectric layers, including such layers having a varied concentration of barium and strontium within the layer'20077,192,828'Capacitor with high dielectric constant materials and method of making'20077,176,118'Circuit constructions'20077,164,165'MIS capacitor'20077,161,203'Gated field effect device comprising gate dielectric having different K regions'20077,153,751'Method of forming a capacitor'20067,150,789'Atomic layer deposition methods'20067,144,779'Method of forming epitaxial silicon-comprising material'20067,132,355'Method of forming a layer comprising epitaxial silicon and a field effect transistor'20067,129,535'Capacitor constructions'20067,128,787'Atomic layer deposition method'20067,115,489'Methods of growing epitaxial silicon'20067,109,112'Method of providing a structure using self-aligned features'20067,101,767'Methods of forming capacitors'20067,092,234'DRAM cells and electronic systems'20067,087,525'Methods of forming layers over substrates'20067,078,757'Capacitor constructions, semiconductor constructions, and methods of forming electrical contacts and semiconductor constructions'20067,071,508'Capacitor constructions, semiconductor constructions, and methods of forming electrical contacts and semiconductor constructions'20067,056,806'Microfeature workpiece processing apparatus and methods for controlling deposition of materials on microfeature workpieces'20067,052,584'Method of forming a capacitor'20067,048,968'Methods of depositing materials over substrates, and methods of forming layers over substrates'20067,037,730'Capacitor with high dielectric constant materials and method of making'20067,033,884'Methods of forming capacitor constructions'20067,033,642'Plasma enhanced chemical vapor deposition method of forming a titanium silicide comprising layer'20067,029,985'Method of forming MIS capacitor'20067,026,243'Methods of forming conductive material silicides by reaction of metal with silicon'20067,023,043'Top electrode in a strongly oxidizing environment'20067,015,533'Capacitor constructions, semiconductor constructions, and methods of forming electrical contacts and semiconductor constructions'20067,011,978'Methods of forming capacitor constructions comprising perovskite-type dielectric materials with different amount of crystallinity regions'20067,009,240'Structures and methods for enhancing capacitors in integrated circuits'20066,987,055'Methods for deposition of semiconductor material'20066,982,103'Chemical vapor deposition methods of forming barium strontium titanate comprising dielectric layers, including such layers having a varied concentration of barium and strontium within the layer'20066,969,677'Methods of forming conductive metal silicides by reaction of metal with silicon'20056,964,901'Methods of forming rugged electrically conductive surfaces and layers'20056,962,824'Method for controlling deposition of dielectric films'20056,958,267'Methods of forming perovskite-type dielectric materials with chemical vapor deposition'20056,952,029'Thin film capacitor with substantially homogenous stoichiometry'20056,939,723'Method of forming haze-free BST films'20056,940,112'Integrated capacitors fabricated with conductive metal oxides'20056,924,968'Haze-free BST films'20056,917,112'Conductive semiconductor structures containing metal oxide regions'20056,908,639'Mixed composition interface layer and method of forming'20056,905,955'Methods of forming conductive connections, and methods of forming nanofeatures'20056,900,106'Methods of forming capacitor constructions'20056,896,730'Atomic layer deposition apparatus and methods'20056,890,596'Deposition methods'20056,888,188'Capacitor constructions comprising perovskite-type dielectric materials and having different degrees of crystallinity within the perovskite-type dielectric materials'20056,887,521'Gas delivery system for pulsed-type deposition processes used in the manufacturing of micro-devices'20056,884,718'Semiconductor manufacturing process and apparatus for modifying in-film stress of thin films, and product formed thereby'20056,884,296'Reactors having gas distributors and methods for depositing materials onto micro-device workpieces'20056,884,475'Chemical vapor deposition method for depositing a high k dielectric film'20056,881,642'Method of forming a MIM capacitor with metal nitride electrode'20056,878,602'Dielectric cure for reducing oxygen vacancies'20056,869,877'Integrated capacitors fabricated with conductive metal oxides'20056,861,330'Structures and methods for enhancing capacitors in integrated circuits'20056,855,971'Haze-free BST films'20056,852,593'Haze-free BST films'20056,849,494'Dielectric cure for reducing oxygen vacancies'20056,838,122'Chemical vapor deposition methods of forming barium strontium titanate comprising dielectric layers'20056,838,293'Method for controlling deposition of dielectric films'20056,835,664'Methods of forming trenched isolation regions'20046,833,576'Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers'20046,812,112'Methods for forming and integrated circuit structures containing enhanced-surface-area conductive layers'20046,812,110'Methods of forming capacitor constructions, and methods of forming constructions comprising dielectric materials'20046,785,120'Methods of forming hafnium-containing materials, methods of forming hafnium oxide, and capacitor constructions comprising hafnium oxide'20046,784,083'Method for reducing physisorption during atomic layer deposition'20046,780,766'Methods of forming regions of differing composition over a substrate'20046,781,864'System and method for inhibiting imprinting of capacitor structures of a memory'20046,767,823'Plasma enhanced chemical vapor deposition method of forming titanium silicide comprising layers'20046,767,806'METHOD OF FORMING A PATTERNED SUBSTANTIALLY CRYSTALLINE TA2O5 COMPRISING MATERIAL, AND METHOD OF FORMING A CAPACITOR HAVING A CAPACITOR DIELECTRIC REGION COMPRISING SUBSTANTIALLY CRYSTALLINE TA2O5 COMPRISING MATERIAL'20046,764,943'Methods for forming and integrated circuit structures containing enhanced-surface-area conductive layers'20046,759,330'Method of providing a structure using self-aligned features'20046,753,271'Atomic layer deposition methods'20046,753,618'MIM capacitor with metal nitride electrode materials and method of formation'20046,734,051'Plasma enhanced chemical vapor deposition methods of forming titanium silicide comprising layers over a plurality of semiconductor substrates'20046,730,355'Chemical vapor deposition method of forming a material over at least two substrates'20046,727,140'Capacitor with high dielectric constant materials and method of making'20046,720,607'Method for improving the resistance degradation of thin film capacitors'20046,696,716'Structures and methods for enhancing capacitors in integrated ciruits'20046,682,969'Top electrode in a strongly oxidizing environment'20046,673,669'Method of reducing oxygen vacancies and DRAM processing method'20046,673,701'Atomic layer deposition methods'20046,660,535'Method of forming haze- free BST films'20036,649,466'Method of forming DRAM circuitry'20036,617,250'Methods of depositing a layer comprising tungsten and methods of forming a transistor gate line'20036,596,583'Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers'20036,589,839'Dielectric cure for reducing oxygen vacancies'20036,586,796'Capacitor with high dielectric constant materials'20036,586,285'Plasma enhanced chemical vapor deposition method of forming titanium silicide comprising layers'20036,579,756'DRAM processing methods'20036,566,147'Method for controlling deposition of dielectric films'20036,558,517'Physical vapor deposition methods'20036,534,357'Methods for forming conductive structures and structures regarding same'20036,525,365'Dielectric films and capacitor structures including same'20036,522,570'System and method for inhibiting imprinting of capacitor structures of a memory'20036,511,912'Method of forming a non-conformal layer over and exposing a trench'20036,511,896'Method of etching a substantially amorphous TA2O5 comprising layer'20036,492,241'Integrated capacitors fabricated with conductive metal oxides'20026,482,736'Methods for forming and integrated circuit structures containing enhanced-surface-area conductive layers'20026,476,432'Structures and methods for enhancing capacitors in integrated circuits'20026,444,478'Dielectric films and methods of forming same'20026,352,866'Method for improving the sidewall stoichiometry of thin film capacitors'20026,337,237'Capacitor processing method and DRAM processing method'20026,335,049'Chemical vapor deposition methods of forming a high K dielectric layer and methods of forming a capacitor'20026,319,764'Method of forming haze-free BST films'20016,281,142'Dielectric cure for reducing oxygen vacancies'20016,258,655'Method for improving the resistance degradation of thin film capacitors'20016,194,229'Method for improving the sidewall stoichiometry of thin film capacitors'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001–2021Patents assigned to MICRON TECHNOLOGY INC (217)· patent assignee history
2001–2014Based in Boise, ID, US· patent location history
2005–2014Based in Reston, VA, US· patent location history
2007–2015Patents assigned to CREE INC (8)· patent assignee history
2007–2012Based in Sterling, VA, US· patent location history
2011–2017Patents assigned to BASCERI CEM (19)· patent assignee history
2011–2017Based in Cary, NC, US· patent location history
2012–2017Patents assigned to GEHRKE THOMAS (6)· patent assignee history
2013–2021Based in Los Gatos, CA, US· patent location history
2018–2021Patents assigned to QROMIS INC (31)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 217 | 2001–2021 |
| QROMIS INC | 31 | 2018–2021 |
| BASCERI CEMself | 19 | 2011–2017 |
| CREE INC | 8 | 2007–2015 |
| GEHRKE THOMAS | 6 | 2012–2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Boise, ID, US | 156 | 2001–2014 |
| Reston, Virginia, US | 52 | 2005–2014 |
| Los Gatos, California, US | 44 | 2013–2021 |
| Cary, NC, US | 8 | 2011–2017 |
| Sterling, Virginia, US | 3 | 2007–2012 |