Inventor

James M. Cleeves

Inventor
Redwood City, CA, US

Overview

148→
Patents
1984–2017
Patent span
Electricity
Primary field (CPC H)

Patents· 148 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%
H10BElectronic memory devices11%
H10DInorganic electric semiconductor devices10%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1010%
G11CStatic stores9%
F01LCyclically operating valves for machines or engines4%
F02BInternal-combustion piston engines4%
F02DControlling combustion engines4%
G06KGraphical data reading4%
G08BSignalling systems, e.g. personal calling systems4%
PatentTitleYear
9,745,915'Internal combustion engine'20179,650,951'Single piston sleeve valve with optional variable compression ratio capability'20179,528,402'Early exhaust valve opening for improved catalyst light off'20169,400,953'Laser processing enabling radio frequency identification (RFID) customization'20169,316,150'Variable compression ratio diesel engine'20169,267,486'Multi-mode high efficiency internal combustion engine'20169,243,578'Deceleration fuel shut off for carbureted engines'20169,214,243'Three-dimensional nonvolatile memory and method of fabrication'20159,206,749'Variable compression ratio systems for opposed-piston and other internal combustion engines, and related methods of manufacture and use'20159,194,288'High swirl engine'20159,196,641'Printed dopant layers'20159,175,609'Control of combustion mixtures and variability thereof with engine load'20159,171,857'Dense arrays and charge storage devices'20159,165,238'Methods for manufacturing RFID tags and structures formed therefrom'20159,016,255'Sealing of sleeve valves'20159,004,366'Wireless devices including printed integrated circuitry and methods for manufacturing and using the same'20158,981,457'Dense arrays and charge storage devices'20158,960,558'MOS electronic article surveillance, RF and/or RF identification tag/device, and methods for making and using the same'20158,933,806'High reliability surveillance and/or identification tag/devices and methods of making and using the same'20158,912,890'Surveillance devices with multiple capacitors'20148,910,606'Positive control (desmodromic) valve systems for internal combustion engines'20148,904,998'Sleeve valve assembly'20148,897,056'Pillar-shaped nonvolatile memory and method of fabrication'20148,891,264'Series circuits and devices'20148,881,708'Control of combustion mixtures and variability thereof with engine load'20148,853,765'Dense arrays and charge storage devices'20148,840,857'Heterocyclic semiconductor precursor compounds, compositions containing the same, and methods of making such compounds and compositions'20148,823,076'Dense arrays and charge storage devices'20148,796,125'Printed, self-aligned, top gate thin film transistor'20148,796,774'Printed non-volatile memory'20148,776,739'Internal combustion engine valve actuation and adjustable lift and timing'20148,766,332'Optimization of critical dimensions and pitch of patterned features in and above a substrate'20148,758,982'Laser processing enabling radio frequency identification (RFID) customization'20148,651,086'Internal combustion engine'20148,624,049'Dopant group-substituted semiconductor precursor compounds, compositions containing the same, and methods of making such compounds and compositions'20148,617,992'Method of forming metal silicide contact and metal interconnect'20138,573,178'Sleeve valve assembly'20138,544,445'Over-compressed engine'20138,503,215'Vertically stacked field programmable nonvolatile memory and method of fabrication'20138,413,619'Variable compression ratio systems for opposed-piston and other internal combustion engines, and related methods of manufacture and use'20138,372,194'Methods of forming a doped semiconductor thin film, doped semiconductor thin film structures, doped silane compositions, and methods of making such compositions'20138,365,697'Internal combustion engine'20138,304,780'Printed dopant layers'20128,296,943'Method for making surveillance devices with multiple capacitors'20128,283,706'Optimization of critical dimensions and pitch of patterned features in and above a substrate'20128,264,027'Printed non-volatile memory'20128,264,359'High reliability surveillance and/or identification tag/devices and methods of making and using the same'20128,227,320'High reliability surveillance and/or identification tag/devices and methods of making and using the same'20128,211,396'Heterocyclic semiconductor precursor compounds, compositions containing the same, and methods of making such compounds and compositions'20128,208,282'Vertically stacked field programmable nonvolatile memory and method of fabrication'20128,164,423'MOS electronic article surveillance, RF and/or RF identification tag/device, and methods for making and using the same'20128,158,518'Methods of making metal silicide contacts, interconnects, and/or seed layers'20128,138,921'Reliable tag deactivation'20127,981,482'Methods of forming a doped semiconductor thin film, doped semiconductor thin film structures, doped silane compositions, and methods of making such compositions'20117,978,492'Integrated circuit incorporating decoders disposed beneath memory arrays'20117,956,425'Graded gate field'20117,921,817'Internal combustion engine'20117,825,455'Three terminal nonvolatile memory device with vertical gated diode'20107,816,188'Process for fabricating a dielectric film using plasma oxidation'20107,816,189'Vertically stacked field programmable nonvolatile memory and method of fabrication'20107,767,520'Printed dopant layers'20107,768,038'Post vertical interconnects formed with silicide etch stop and method of making'20107,750,792'Multi-mode tags and methods of making and using the same'20107,709,307'Printed non-volatile memory'20107,701,011'Printed dopant layers'20107,691,691'Semiconductor device and methods for making the same'20107,687,327'Methods for manufacturing RFID tags and structures formed therefrom'20107,675,464'Plated antenna for high frequency devices'20107,674,926'Dopant group-substituted semiconductor precursor compounds, compositions containing the same, and methods of making such compounds and compositions'20107,619,248'MOS transistor with self-aligned source and drain, and method for making the same'20097,559,298'Internal combustion engine'20097,498,948'Electronic article surveillance (EAS) tag/device with coplanar and/or multiple coil circuits, an EAS tag/device with two or more memory bits, and methods for tuning the resonant frequency of an RLC EAS tag/device'20097,453,755'Memory cell with high-K antifuse for reverse bias programming'20087,423,304'Optimization of critical dimensions and pitch of patterned features in and above a substrate'20087,413,945'Electrically isolated pillars in active devices'20087,387,260'MOS electronic article surveillance, RF and/or RF identification tag/device, and methods for making and using the same'20087,319,053'Vertically stacked field programmable nonvolatile memory and method of fabrication'20087,314,513'Methods of forming a doped semiconductor thin film, doped semiconductor thin film structures, doped silane compositions, and methods of making such compositions'20087,309,951'Spark plug'20077,307,012'Post vertical interconnects formed with silicide etch stop and method of making'20077,286,053'Electronic article surveillance (EAS) tag/device with coplanar and/or multiple coil circuits, an EAS tag/device with two or more memory bits, and methods for tuning the resonant frequency of an RLC EAS tag/device'20077,265,000'Vertically stacked field programmable nonvolatile memory and method of fabrication'20077,245,000'Electrically isolated pillars in active devices'20077,195,992'Method of uniform seeding to control grain and defect density of crystallized silicon for use in sub-micron thin film transistors'20077,190,602'Integrated circuit incorporating three-dimensional memory array with dual opposing decoder arrangement'20077,160,761'Vertically stacked field programmable nonvolatile memory and method of fabrication'20077,158,102'System and method for recalibrating flat panel field emission displays'20077,157,314'Vertically stacked field programmable nonvolatile memory and method of fabrication'20077,152,804'MOS electronic article surveillance, RF and/or RF identification tag/device, and methods for making and using the same'20067,129,538'Dense arrays and charge storage devices'20067,115,967'Three-dimensional memory'20067,098,581'Spark plug'20067,081,377'Three-dimensional memory'20067,071,565'Patterning three dimensional structures'20066,982,476'Integrated circuit feature layout for improved chemical mechanical polishing'20066,954,394'Integrated circuit and method for selecting a set of memory-cell-layer-dependent or temperature-dependent operating conditions'20056,952,043'Electrically isolated pillars in active devices'20056,881,994'Monolithic three dimensional array of charge storage devices containing a planarized surface'20056,875,641'Three-dimensional memory'20056,786,998'Wafer temperature control apparatus and method'20046,780,683'Vertically-stacked, field-programmable, nonvolatile memory and method of fabrication'20046,770,939'Thermal processing for three dimensional circuits'20046,768,185'Formation of antifuse structure in a three dimensional memory'20046,730,931'Integrated circuit feature layout for improved chemical mechanical polishing'20046,704,235'Anti-fuse memory cell with asymmetric breakdown voltage'20046,677,204'Multigate semiconductor device with vertical channel current and method of fabrication'20046,664,639'Contact and via structure and method of fabrication'20036,649,451'Structure and method for wafer comprising dielectric and semiconductor'20036,639,312'Dummy wafers and methods for making the same'20036,635,556'Method of preventing autodoping'20036,627,530'Patterning three dimensional structures'20036,624,011'Thermal processing for three dimensional circuits'20036,591,394'Three-dimensional memory array and method for storing data bits and ECC bits therein'20036,580,124'Multigate semiconductor device with vertical channel current and method of fabrication'20036,574,145'Memory device and method for sensing while programming a non-volatile memory cell'20036,541,312'Formation of antifuse structure in a three dimensional memory'20036,534,403'Method of making a contact and via structure'20036,515,904'Method and system for increasing programming bandwidth in a non-volatile memory device'20036,515,923'Memory array organization and related test method particularly well suited for integrated circuits having write-once memory arrays'20036,486,065'Method of forming nonvolatile memory device utilizing a hard mask'20026,486,066'Method of generating integrated circuit feature layout for improved chemical mechanical polishing'20026,483,736'Vertically stacked field programmable nonvolatile memory and method of fabrication'20026,407,953'Memory array organization and related test method particularly well suited for integrated circuits having write-once memory arrays'20026,385,074'Integrated circuit structure including three-dimensional memory array'20026,351,406'Vertically stacked field programmable nonvolatile memory and method of fabrication'20026,185,122'Vertically stacked field programmable nonvolatile memory and method of fabrication'20016,144,144'Patterned resistor suitable for electron-emitting device'20006,091,129'Self-aligned trench isolated structure'20006,034,882'Vertically stacked field programmable nonvolatile memory and method of fabrication'20006,019,658'Fabrication of gated electron-emitting device utilizing distributed particles to define gate openings, typically in combination with spacer material to control spacing between gate layer and electron-emissive elements'20006,016,012'Thin liner layer providing reduced via resistance'20006,004,874'Method for forming an interconnect'19995,865,659'Fabrication of gated electron-emitting device utilizing distributed particles to define gate openings and utilizing spacer material to control spacing between gate layer and electron-emissive elements'19995,830,804'Encapsulated dielectric and method of fabrication'19985,830,797'Interconnect methods and apparatus'19985,710,061'Disposable post processing for semiconductor device fabrication'19985,693,556'Method of making an antifuse metal post structure'19975,686,223'Method for reduced pitch lithography'19975,652,084'Method for reduced pitch lithography'19975,652,182'Disposable posts for self-aligned non-enclosed contacts'19975,573,971'Planar antifuse and method of fabrication'19965,366,929'Method for making reliable selective via fills'19945,091,047'Plasma etching using a bilayer mask'19925,045,150'Plasma etching using a bilayer mask'19914,883,772'Process for making a self-aligned silicide shunt'19894,806,504'Planarization method'19894,489,482'Impregnation of aluminum interconnects with copper'19844,443,295'Method of etching refractory metal film on semiconductor structures utilizing triethylamine and H.sub.2 O.sub.2'1984

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1984–2017Based in Redwood City, CA, US· patent location history
2000–2005Patents assigned to MATRIX SEMICONDUCTOR INC (29)· patent assignee history
2006–2014Patents assigned to KOVIO INC (29)· patent assignee history
2006–2015Patents assigned to SANDISK 3D LLC (27)· patent assignee history
2006–2017Patents assigned to CLEEVES JAMES M (20)· patent assignee history
2012–2015Patents assigned to CLEEVES JAMES MONTAGUE (23)· patent assignee history
2014Based in San Carlos, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
KOVIO INC292006–2014
MATRIX SEMICONDUCTOR INC292000–2005
SANDISK 3D LLC272006–2015
CLEEVES JAMES MONTAGUEself232012–2015
CLEEVES JAMES Mself202006–2017
Locations
LocationPatentsSpan
Redwood City, California, US1471984–2017
San Carlos, California, US12014