Inventor

John Eric LINSTADT

Inventor
US

Overview

88→
Patents
2021–2026
Patent span
Physics
Primary field (CPC G)

Patents· 88 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing43%
G11CStatic stores32%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use7%
H01LSemiconductor devices4%
H03MCoding3%
H03KPulse technique3%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
A41DOuterwear1%
A45FTravelling or camp equipment: sacks or packs carried on the body1%
H10NElectric solid-state devices not otherwise provided for1%
PatentTitleYear
12,592,296Buffer circuit with adaptive repair capability202612,566,557DRAM refresh control with master wordline granularity of refresh intervals202612,536,067Configurable in-array event tracking202612,504,904Memory controller partitioning for hybrid memory system202512,436,907Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules202512,412,603Flexible metadata allocation and caching202512,411,781Memory system with cached memory module operations202512,394,500Memory system with error detection202512,375,109Integration of compression algorithms with error correction codes202512,346,198Selectable multi-stage error detection and correction202512,347,480Memory system with multiple open rows per bank202512,346,567Partial array refresh timing202512,321,234Energy efficient storage of error-correction-detection information202512,321,502Integrity and data encryption (IDE) buffer device with low-latency containment mode202512,306,716Error coalescing202512,306,711Dynamically configurable memory error control schemes202512,298,926High-performance, high-capacity memory systems and modules202512,298,842Memory module register access202512,237,255Vertical interconnects with variable pitch for scalable escape routing202512,230,355Hierarchical bank group timing202512,229,435Memory component with input/output data rate alignment202512,222,829Memory module with dedicated repair devices202512,213,548Hybrid memory module202512,210,467Memory modules and systems with variable-width data ranks and configurable data-rank timing202512,135,645Nonvolatile physical memory with DRAM cache202412,105,975Adjustable access energy and access latency memory system and devices202412,040,035Buffer circuit with adaptive repair capability202412,032,845Memory controller partitioning for hybrid memory system202412,007,916Local internal discovery and configuration of individually selected and jointly selected devices202412,002,532Command/address channel error detection202412,001,283Energy efficient storage of error-correction-detection information202411,996,160Low power signaling interface202411,973,153Synchronous wired-or ACK status for memory with variable write latency202411,967,364Variable width memory module supporting enhanced error detection and correction202411,953,981Memory module register access202411,947,474Multi-mode memory module and memory component202411,941,369Dual-domain combinational logic circuitry202411,914,888Memory component with input/output data rate alignment202411,900,984Data destruction202411,868,619Partial array refresh timing202411,862,236Memory component for deployment in a dynamic stripe width memory system202411,842,761Memory system with multiple open rows per bank202311,836,099Memory system with cached memory module operations202311,836,044Error coalescing202311,815,940Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules202311,809,345Data-buffer component with variable-width data ranks and configurable data-rank timing202311,804,259Floating body dram with reduced access energy202311,790,973Memory component with efficient write operations202311,782,807Memory module with dedicated repair devices202311,755,220Adjustable access energy and access latency memory system and devices202311,755,508High-performance, high-capacity memory systems and modules202311,735,287Buffer circuit with adaptive repair capability202311,714,752Nonvolatile physical memory with DRAM cache202311,705,187Variable width memory module supporting enhanced error detection and correction202311,683,050Memory controller and method of data bus inversion using an error detection correction code202311,650,944Local internal discovery and configuration of individually selected and jointly selected devices202311,653,476Memory subsystem for a cryogenic digital system202311,646,094Memory system with error detection202311,645,152Energy efficient storage of error-correction-detection information202311,636,915Command/address channel error detection202311,600,316DRAM security erase202311,573,849Memory module register access202311,551,735High performance, non-volatile memory module202311,544,145Error coalescing202311,527,302Buffer circuit with adaptive repair capability202211,526,632Securing address information in a memory controller202211,481,192Dual-domain combinational logic circuitry202211,456,025Hybrid memory module202211,450,356Synchronous signaling interface with over-clocked timing reference202211,403,030Memory component with input/output data rate alignment202211,393,550Memory system with error detection202211,379,392Multi-mode memory module and memory component202211,379,136Adjustable access energy and access latency memory system and devices202211,361,839Command/address channel error detection202211,349,496Memory controller and method of data bus inversion using an error detection correction code202211,347,608Memory module with dedicated repair devices202211,347,587Energy efficient storage of error-correction-detection information202211,341,070Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules202211,323,118Low power logic circuitry202211,309,015Floating body DRAM with reduced access energy202211,301,378Nonvolatile physical memory with DRAM cache and mapping thereof202211,275,702Memory module and registered clock driver with configurable data-rank timing202211,264,085Memory component for deployment in a dynamic stripe width memory system202211,257,539Reduced transport energy in a memory system202211,210,244Local internal discovery and configuration of individually selected and jointly selected devices202111,210,242Memory system with cached memory module operations202111,176,037Wear leveling in a memory system202111,164,622Variable width memory module supporting enhanced error detection and correction2021

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2021–2026Patents assigned to RAMBUS INC (88)· patent assignee history
2021–2026Based in US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
RAMBUS INC882021–2026
Locations
LocationPatentsSpan
US882021–2026