Inventor
Chung-Sun Lee
Inventor
Gyeonggi-do, KR
Overview
Patents· 17 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1037%
H05KPrinted circuits14%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation12%
B82YSpecific uses or applications of nanostructures7%
Y10TTechnical subjects covered by former us classification7%
H01LSemiconductor devices5%
H04NPictorial communication, e.g. television5%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h105%
B23KSoldering or unsoldering2%
C22CAlloys2%
PatentTitleYear
9,343,432'Semiconductor chip stack having improved encapsulation'20168,791,562'Stack package and semiconductor package including the same'20148,604,615'Semiconductor device including a stack of semiconductor chips, underfill material and molding material'20138,250,750'Method for manufacturing tape wiring board'20128,114,701'Camera modules and methods of fabricating the same'20127,948,555'Camera module and electronic apparatus having the same'20117,895,742'Method for manufacturing tape wiring board'20117,893,514'Image sensor package, method of manufacturing the same, and image sensor module including the image sensor package'20117,884,392'Image sensor having through via'20117,786,581'Method of manufacturing a semiconductor device having an even coating thickness using electro-less plating, and related device'20107,619,315'Stack type semiconductor chip package having different type of chips and fabrication method thereof'20097,569,423'Wafer-level-chip-scale package and method of fabrication'20097,554,201'Tin-bismuth (Sn-Bi) family alloy solder and semiconductor device using the same'20097,299,547'Method for manufacturing tape wiring board'20077,190,073'Circuit film with bump, film package using the same, and related fabrication methods'20077,087,987'Tape circuit substrate and semiconductor chip package using the same'20067,078,331'Method of forming redistribution bump and semiconductor chip and mount structure fabricated using the same'2006Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2006–2016Patents assigned to SAMSUNG ELECTRONICS CO LTD (16)· patent assignee history
2006–2012Based in Gyeonggi-do, KR· patent location history
2006Based in Suwon-si, KR· patent location history
2009–2016Based in Anyang-si, KR· patent location history
2010Based in Yongin-si, KR· patent location history
2011–2014Patents assigned to LEE CHUNG-SUN (5)· patent assignee history
2011–2012Patents assigned to KWON YONG-HWAN (3)· patent assignee history
2011–2012Patents assigned to CHO TAE-JE (2)· patent assignee history
2011–2012Patents assigned to JANG HYUNG-SUN (2)· patent assignee history
2011–2014Based in Gunpo-si, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 16 | 2006–2016 |
| LEE CHUNG-SUNself | 5 | 2011–2014 |
| KWON YONG-HWAN | 3 | 2011–2012 |
| CHO TAE-JE | 2 | 2011–2012 |
| JANG HYUNG-SUN | 2 | 2011–2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Gyeonggi-do, KR | 8 | 2006–2012 |
| Anyang-si, KR | 4 | 2009–2016 |
| Gunpo-si, KR | 3 | 2011–2014 |
| Yongin-si, KR | 1 | 2010 |
| Suwon-si, KR | 1 | 2006 |