Inventor
Trevor K. Monk
Inventor
Chepstow, GB
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique36%
G11CStatic stores17%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests14%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses8%
H10BElectronic memory devices8%
G06FElectric digital data processing6%
G05FSystems for regulating electric or magnetic variables3%
H02JElectric power networks3%
H10DInorganic electric semiconductor devices3%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications3%
PatentTitleYear
8,076,907'Method and apparatus for exporting power in a renewable energy system employing a battery charger'20117,880,500'Logical signal voltage converter'20117,266,787'Method for optimising transistor performance in integrated circuits'2007RE037124'Ring oscillator using current mirror inverter stages'20016,208,179'Dividing circuit and transistor stage therefor'20016,150,865'Method for the positioning/routing of a global clock circuit on an integrated circuit, and associated devices'20006,133,796'Programmable divider circuit with a tri-state inverter'20006,097,783'Dividing circuit for dividing by even numbers'20005,731,714'Off-chip driver circuit'19985,729,157'Off-chip driver circuit'19985,635,877'Low voltage high frequency ring oscillator for controling phase-shifted outputs'19975,635,866'Frequency Doubler'19975,602,514'Quadrature oscillator having a variable frequency'19975,525,938'Ring oscillator using current mirror inverter stages'19965,430,388'Output noise reduction circuit'19955,321,651'Read and write circuitry for a memory'19944,663,739'Semiconductor memories'19874,627,028'Memory decoder circuit'19864,616,345'Semiconductor memory'19864,584,671'Semiconductor memories'19864,583,203'Memory output circuit'1986Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1986Patents assigned to STANDARD TELEPHONES CABLES LTD (3)· patent assignee history
1986Patents assigned to ITT (1)· patent assignee history
1986–1994Based in Bexley, GB· patent location history
1994–1996Patents assigned to INMOS LTD (3)· patent assignee history
1996–2001Based in Chepstow, GB· patent location history
1997–2001Patents assigned to SGS THOMSON MICROELECTRONICS (9)· patent assignee history
2000–2011Based in Gwent, GB· patent location history
2007–2011Patents assigned to ICERA INC (2)· patent assignee history
2007Based in Tutshill, GB· patent location history
2011Based in Surrey, CA· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SGS THOMSON MICROELECTRONICS | 9 | 1997–2001 |
| INMOS LTD | 3 | 1994–1996 |
| STANDARD TELEPHONES CABLES LTD | 3 | 1986 |
| ICERA INC | 2 | 2007–2011 |
| ITT | 1 | 1986 |
Locations
| Location | Patents | Span |
|---|---|---|
| Chepstow, GB | 7 | 1996–2001 |
| Bexley, GB | 6 | 1986–1994 |
| Gwent, GB | 4 | 2000–2011 |
| Surrey, CA | 1 | 2011 |
| Tutshill, GB | 1 | 2007 |