Inventor
Fred Chen
Inventor
Hsinchu, TW
Overview
Patents· 6 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G03Fprimary
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices43%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1043%
H01JElectric discharge tubes or discharge lamps14%
PatentTitleYear
7,014,956'Active secondary exposure mask to manufacture integrated circuits'20066,942,958'Modifying circuitry features in radiation sensitive layers with active secondary exposure masks'20056,210,843'Modulation of peripheral critical dimension on photomask with differential electron beam dose'20016,174,798'Process for forming metal interconnect stack for integrated circuit structure'20016,147,409'Modified multilayered metal line structure for use with tungsten-filled vias in integrated circuit structures'20006,087,726'Metal interconnect stack for integrated circuit structure'2000Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2000–2001Patents assigned to LSI LOGIC CORP (3)· patent assignee history
2000–2001Based in Hsinchu, TW· patent location history
2001–2006Patents assigned to INTEL CORP (3)· patent assignee history
2001Based in San Jose, CA, US· patent location history
2005–2006Based in Cupertino, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 3 | 2001–2006 |
| LSI LOGIC CORP | 3 | 2000–2001 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 3 | 2000–2001 |
| Cupertino, California, US | 2 | 2005–2006 |
| San Jose, California, US | 1 | 2001 |