Inventor
Chih-Wei Hsiung
Inventor
San Jose, CA, US
Overview
Patents· 28 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Fprimary
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation32%
H01LSemiconductor devices27%
H04NPictorial communication, e.g. television14%
H10DInorganic electric semiconductor devices11%
H10BElectronic memory devices7%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h104%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h103%
G02BOptical elements, systems or apparatus1%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests1%
PatentTitleYear
10,848,697Image sensors with phase detection auto focus pixels202010,304,882Source follower device for enhanced image sensor performance201910,204,951Cross talk reduction for high dynamic range image sensors201910,181,490Cross talk reduction for high dynamic range image sensors201910,121,809Backside-illuminated color image sensors with crosstalk-suppressing color filter array201810,073,239Dual photodiode for phase detection autofocus20189,986,192Through-semiconductor and through-dielectric isolation structure20189,923,009'Image sensor with hybrid deep trench isolation'20189,735,196'Photosensitive capacitor pixel for image sensor'20179,691,810'Curved image sensor'20179,565,405'Image sensor with enhanced quantum efficiency'20179,520,431'Self-aligned isolation structures and light filters'20169,490,282'Photosensitive capacitor pixel for image sensor'20169,455,291'Blue enhanced image sensor'20169,443,899'BSI CMOS image sensor with improved phase detecting pixel'20169,431,452'Back side illuminated image sensor pixel with dielectric layer reflecting ring'20169,391,111'Stacked integrated circuit system with thinned intermediate semiconductor die'20169,240,431'Conductive trench isolation'20169,224,881'Layers for increasing performance in image sensors'20159,111,993'Conductive trench isolation'20158,956,961'Semiconductor device and method for making the same'20158,557,646'Method for fabricating a vertical transistor'20138,461,056'Self-aligned wet etching process'20138,437,184'Method of controlling a vertical dual-gate dynamic random access memory'20138,431,975'Back-side illumination image sensor'20138,367,455'Image sensor and related fabricating method thereof'20138,357,964'Three-dimensional dynamic random access memory with an ancillary electrode structure'20136,033,232'Process of fabricating photodiode integrated with MOS device'2000Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2000Based in Hsinchu, TW· patent location history
2013–2015Patents assigned to HSIUNG CHIH-WEI (7)· patent assignee history
2013–2015Patents assigned to REXCHIP ELECTRONICS CORP (5)· patent assignee history
2013–2015Patents assigned to CHEN MENG-HSIEN (4)· patent assignee history
2013–2015Patents assigned to AI CHUNG-YUNG (3)· patent assignee history
2013–2015Based in Taichung, TW· patent location history
2013Based in Grand Cayman, KY· patent location history
2015–2020Patents assigned to OMNIVISION TECH INC (20)· patent assignee history
2015–2020Based in San Jose, CA, US· patent location history
2015Based in Zhubei City, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| OMNIVISION TECH INC | 20 | 2015–2020 |
| HSIUNG CHIH-WEIself | 7 | 2013–2015 |
| REXCHIP ELECTRONICS CORP | 5 | 2013–2015 |
| CHEN MENG-HSIEN | 4 | 2013–2015 |
| AI CHUNG-YUNG | 3 | 2013–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 19 | 2015–2020 |
| Taichung, TW | 5 | 2013–2015 |
| Grand Cayman, KY | 2 | 2013 |
| Zhubei City, TW | 1 | 2015 |
| Hsinchu, TW | 1 | 2000 |