Inventor
Bradley S. Nelson
Inventor
Austin, TX, US
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing92%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests8%
PatentTitleYear
10,380,031Ensuring forward progress for nested translations in a memory management unit201910,318,435Ensuring forward progress for nested translations in a memory management unit20198,984,261'Store data forwarding with no memory model restrictions'20158,627,047'Store data forwarding with no memory model restrictions'20148,468,306'Microprocessor and method for deferred store data forwarding for store background data in a system with no memory model restrictions'20138,238,190'Clock-gated model transformation for asynchronous testing of logic targeted for free-running, data-gated logic'20127,995,619'Methods and arrangements to model an asynchronous interface'20117,885,801'Modeling asynchronous behavior from primary inputs and latches'20117,877,717'Accurately modeling an asynchronous interface using expanded logic elements'20117,870,528'Method and system for unfolding/replicating logic paths to facilitate modeling of metastable value propagation'20117,536,288'Method, system and program product supporting user tracing in a simulator'20097,519,524'Program product for providing a configuration specification language supporting incompletely specified configuration entities'20097,484,192'Method for modeling metastability decay through latches in an integrated circuit model'20097,484,196'Method for asynchronous clock modeling in an integrated circuit simulation'20097,453,759'Clock-gated model transformation for asynchronous testing of logic targeted for free-running, data-gated logic'20087,447,620'Modeling asynchronous behavior from primary inputs and latches'20087,448,015'Method and system for unfolding/replicating logic paths to facilitate modeling of metastable value propagation'20087,426,461'Method, system and program product for providing a configuration specification language supporting incompletely specified configuration entities'20087,302,659'System and method for unfolding/replicating logic paths to facilitate propagation delay modeling'20077,299,436'System and method for accurately modeling an asynchronous interface using expanded logic elements'20077,089,518'Method and program product for modelling behavior of asynchronous clocks in a system having multiple clocks'20066,993,729'Method, system and program product for specifying a dial group for a digital system described by a hardware description language (HDL) model'2006Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2006–2019Patents assigned to IBM (22)· patent assignee history
2006–2019Based in Austin, TX, US· patent location history
2013–2014Patents assigned to BARRICK BRIAN D (2)· patent assignee history
2013–2014Patents assigned to KRUMM BARRY W (2)· patent assignee history
2013–2014Patents assigned to MITCHELL JAMES R (2)· patent assignee history
2013–2014Patents assigned to NELSON BRADLEY (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 22 | 2006–2019 |
| BARRICK BRIAN D | 2 | 2013–2014 |
| KRUMM BARRY W | 2 | 2013–2014 |
| MITCHELL JAMES R | 2 | 2013–2014 |
| NELSON BRADLEYself | 2 | 2013–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Austin, Texas, US | 22 | 2006–2019 |