Inventor
Yasuhiro Fujii
Inventor
Kawasaki, JP
Overview
Patents· 79 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores15%
C08GMacromolecular compounds obtained otherwise than by reactions only involving unsaturated carbon-to-carbon bonds7%
Y10TTechnical subjects covered by former us classification6%
B05DProcesses for applying fluent materials to surfaces, in general6%
C08JWorking-up4%
C09DCoating compositions, e.g. paints, varnishes or lacquers4%
H01QAntennas, i.e. radio aerials3%
B29KIndexing scheme associated with subclasses b29b, b29c or b29d, relating to moulding materials or to materials for moulds, reinforcements, fillers or preformed parts, e.g. inserts3%
G06FElectric digital data processing3%
H10BElectronic memory devices3%
PatentTitleYear
10,128,233Semiconductor device and semiconductor device manufacturing method201810,122,016Nickel-manganese composite oxyhydroxide, its production method, and its application201810,109,857Metal-containing trimanganese tetraoxide composite particles and method for producing same20189,542,413'Stored data deduplication method, stored data deduplication apparatus, and deduplication program'20179,390,765'SRAM with via displacement'20169,311,494'Secure search method and secure search device'20168,542,041'Semiconductor device and system'20138,372,718'Manufacturing method of semiconductor device and semiconductor device'20138,288,232'Manufacturing method of semiconductor device and semiconductor device'20127,808,161'Piezoelectric ceramic composition and piezoelectric device'20107,577,843'System and method for controlling contents by plurality of pieces of control information'20097,499,565'Method of watermarking for binary images'20097,131,776'Printed matter reliability decision method'20066,853,022'Semiconductor memory device'20056,831,852'Semiconductor memory device having a latch circuit and storage capacitor'20046,774,441'Semiconductor device having an MIS transistor'20046,774,655'Semiconductor device, method of testing the semiconductor device, and semiconductor integrated circuit'20046,708,263'Data transfer memory having the function of transferring data on a system bus'20046,693,360'Static type semiconductor memory device'20046,621,283'Semiconductor device, method of testing the semiconductor device, and semiconductor integrated circuit'20036,467,323'Plate reduction press apparatus and methods'20026,463,652'Apparatus and methods for manufacturing hot rolled steel sheets'20026,393,541'Data transfer memory having the function of transferring data on a system bus'20026,313,319'Method for purifying lactide and lactide for food additives'20016,268,627'Semiconductor device having impurity regions with varying impurity concentrations'20016,200,245'Apparatus and method for changing dies'20016,194,930'DLL circuit'20016,133,781'Semiconductor device utilizing unnecessary electric charge on complementary signal line pair'20006,108,793'Semiconductor device having timing-stabilization circuit and method of testing such semiconductor device'20006,063,640'Semiconductor wafer testing method with probe pin contact'20005,973,525'Integrated circuit device'19995,917,745'Semiconductor memory device'19995,880,254'Method for producing polylactic acid and apparatus used therefor'19995,866,677'Method and system for producing poly (lactic acid)'19995,828,594'Semiconductor memory with hierarchical bit lines'19985,770,682'Method for producing polylactic acid'19985,701,269'Semiconductor memory with hierarchical bit lines'19975,673,226'Dynamic random access memory having sense amplifier control circuit supplied with external sense amplifier activating signal'19975,663,917'Semiconductor circuit having MOS circuit for use in strong electric field'19975,617,363'Dynamic random access memory having sense amplifier control circuit supplied with external sense amplifier activating signal'19975,593,778'Biodegradable copolyester, molded article produced therefrom and process for producing the molded article'19975,561,626'Semiconductor memory with hierarchical bit lines'19965,552,557'Process for preparing 2-cyanoimidazole compounds by reaction of an amino ketone compound'19965,471,425'Dynamic random access memory having sense amplifier control circuit supplied with external sense amplifier activating signal'19955,428,577'Semiconductor storage device having word-line voltage booster circuit with decoder and charger'19955,414,055'Coating resin compositions'19955,319,607'Semiconductor unit'19945,291,447'Semiconductor memory device having function of controlling sense amplifiers'19945,269,820'Method for surface treatment of plastic material and apparatus used therefor'19935,260,407'Polyimide film and preparation process of the film'19935,242,716'Barrier coating process using olefin resin and urethane resin'19935,243,357'Waveguide feeding array antenna'19935,223,176'Zirconia sol and method for making the same'19935,206,339'Extrusion process of polyimide and polyimide pellet used for the process'19935,119,334'Dynamic random access memory having improved word line control'19925,112,557'Process for preparing a polyimide molded form'19925,083,132'Planar antenna with active circuit block'19925,069,848'Extrusion process of polyimide and polyimide pellet used for the process'19915,037,587'Preparation process of polyimide film'19915,011,881'Aqueous thermoplastic coating composition for plastics materials and coating method using same'19915,011,733'Process for coating metallic substrate'19914,999,592'Converter for planar antenna'19914,985,449'N-benzoyl-N-pyridyloxy phenyl urea compounds and pesticide compositions containing them'19914,983,454'Process for coating metallic substrate'19914,981,759'Coating method'19914,861,799'Benzoylurea compounds and pesticides containing them'19894,857,938'Planar antenna'19894,851,855'Planar antenna'19894,829,309'Planar antenna'19894,816,835'Planar antenna with patch elements'19894,759,961'Coating method with crosslinked coatings from two coat-one bake systems'19884,756,975'Process for coating automotive outer bodies'19884,755,434'Process for coating metallic substrate'19884,755,435'Process for coating steel panels'19884,752,914'Semiconductor integrated circuit with redundant circuit replacement'19884,707,806'Semiconductor integrated circuit device having fuse-type information storing circuit'19874,592,025'Information storing circuit using blown and unblown fuses'19864,529,632'Two coat one bake method for substrates which have metal and plastic component'19854,440,913'Coating composition for pliable substrates'1984Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1984–1995Patents assigned to KANSAI PAINT CO LTD (11)· patent assignee history
1984–1993Based in Hiratsuka, JP· patent location history
1986–2004Patents assigned to FUJITSU LTD (24)· patent assignee history
1986–2013Based in Yokohama, JP· patent location history
1989–1993Patents assigned to MATSUSHITA ELECTRIC WORKS LTD (7)· patent assignee history
1992–2004Based in Kawasaki, JP· patent location history
2001–2005Based in Hyogo, JP· patent location history
2006–2017Patents assigned to HITACHI LTD (5)· patent assignee history
2012–2017Patents assigned to FUJII YASUHIRO (5)· patent assignee history
2012–2018Based in Tokyo, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| FUJITSU LTD | 24 | 1986–2004 |
| KANSAI PAINT CO LTD | 11 | 1984–1995 |
| MATSUSHITA ELECTRIC WORKS LTD | 7 | 1989–1993 |
| FUJII YASUHIROself | 5 | 2012–2017 |
| HITACHI LTD | 5 | 2006–2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kawasaki, JP | 21 | 1992–2004 |
| Hiratsuka, JP | 8 | 1984–1993 |
| Yokohama, JP | 7 | 1986–2013 |
| Tokyo, JP | 6 | 2012–2018 |
| Hyogo, JP | 5 | 2001–2005 |