Inventor

Patricia M. Liu

Inventor
Saratoga, CA, US

Overview

20→
Patents
2001–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 20 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1027%
H10DInorganic electric semiconductor devices23%
C23CCoating metallic material16%
H01JElectric discharge tubes or discharge lamps14%
H01LSemiconductor devices9%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
B82YSpecific uses or applications of nanostructures2%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation2%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
PatentTitleYear
11,081,358Silicide film nucleation202110,872,763Treatments to enhance material structures202010,861,722Integrated semiconductor processing20209,437,640'Engineering induced tunable electrostatic effect'20169,048,183'NMOS metal gate materials, manufacturing methods, and equipment using CVD and ALD processes with metal based precursors'20158,778,816'In situ vapor phase surface activation of SiO2 '20148,658,522'Methods and apparatus for incorporating nitrogen in oxide films'20148,642,468'NMOS metal gate materials, manufacturing methods, and equipment using CVD and ALD processes with metal based precursors'20148,375,892'Methods and apparatus for incorporating nitrogen in oxide films'20137,913,645'Methods and apparatus for incorporating nitrogen in oxide films'20117,902,050'Methods and apparatus for incorporating nitrogen in oxide films'20117,837,838'Method of fabricating a high dielectric constant transistor gate using a low energy plasma apparatus'20107,678,710'Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system'20107,645,710'Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system'20106,454,860'Deposition reactor having vaporizing, mixing and cleaning capabilities'20026,328,808'Apparatus and method for aligning and controlling edge deposition on a substrate'20016,274,058'Remote plasma cleaning method for processing chambers'20016,218,300'Method and apparatus for forming a titanium doped tantalum pentaoxide dielectric layer using CVD'20016,204,203'Post deposition treatment of dielectric films for interface control'20016,186,092'Apparatus and method for aligning and controlling edge deposition on a substrate'2001

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2001–2021Patents assigned to APPLIED MATERIALS INC (20)· patent assignee history
2001–2021Based in Saratoga, CA, US· patent location history
2013–2014Patents assigned to LIU PATRICIA M (3)· patent assignee history
2014Patents assigned to MAHAJANI MAITREYEE (2)· patent assignee history
2014Patents assigned to ANTHIS JEFFREY W (1)· patent assignee history
2014Patents assigned to BEVAN MALCOLM J (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
APPLIED MATERIALS INC202001–2021
LIU PATRICIA Mself32013–2014
MAHAJANI MAITREYEE22014
ANTHIS JEFFREY W12014
BEVAN MALCOLM J12014
Locations
LocationPatentsSpan
Saratoga, California, US202001–2021