Inventor
Suresh Upadhyayula
Inventor
San Jose, CA, US
Overview
Patents· 20 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1040%
H01LSemiconductor devices16%
Y10TTechnical subjects covered by former us classification12%
G06KGraphical data reading7%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h107%
G06FElectric digital data processing5%
H01RElectrically-conductive connections5%
H05KPrinted circuits5%
G11CStatic stores2%
LOC142%
PatentTitleYear
10,325,881Vertical semiconductor device having a stacked die block201910,177,128Semiconductor device including support pillars on solder mask20199,773,766'Semiconductor device including independent film layer for embedding and/or spacing semiconductor die'20179,761,290'Overheat prevention for annealing non-volatile memory'20179,218,953'Low profile wire bonded USB device'20158,987,053'Semiconductor package including flip chip controller at bottom of die stack'20158,986,050'Connector of a universal serial bus device'20158,947,883'Low profile wire bonded USB device'20158,659,133'Etched surface mount islands in a leadframe package'20148,637,963'Radiation-shielded semiconductor device'20148,637,779'Electronic component including micro balls'20148,575,739'Col-based semiconductor package including electrical connections through a single layer leadframe'20138,373,268'Semiconductor package including flip chip controller at bottom of die stack'20138,022,417'Method of assembling semiconductor devices with LEDS'20118,008,132'Etched surface mount islands in a leadframe package'20117,867,819'Semiconductor package including flip chip controller at bottom of die stack'20117,812,356'Method of assembling semiconductor devices with LEDS'20107,384,817'Method of assembling semiconductor devices with LEDs'20087,354,314'Electrical connector with grounding pin'2008D0524817'Portable memory storage device'2006Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2006–2011Patents assigned to SANDISK CORP (5)· patent assignee history
2006–2019Based in San Jose, CA, US· patent location history
2011–2019Patents assigned to SANDISK TECHNOLOGIES INC (12)· patent assignee history
2013–2015Patents assigned to TAKIAR HEM (5)· patent assignee history
2013–2015Patents assigned to UPADHYAYULA SURESH (5)· patent assignee history
2017–2019Patents assigned to SANDISK TECHNOLOGIES LLC (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SANDISK TECHNOLOGIES INC | 12 | 2011–2019 |
| SANDISK CORP | 5 | 2006–2011 |
| TAKIAR HEM | 5 | 2013–2015 |
| UPADHYAYULA SURESHself | 5 | 2013–2015 |
| SANDISK TECHNOLOGIES LLC | 2 | 2017–2019 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 20 | 2006–2019 |