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Inventor

Kazunobu Ota

Inventor
Tokyo, JP

Overview

34→
Patents
2001–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 34 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices24%
H01LSemiconductor devices22%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1019%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation18%
H04NPictorial communication, e.g. television10%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
B81CProcesses or apparatus specially adapted for the manufacture or treatment of microstructural devices or systems1%
H10KOrganic electric solid-state devices1%
PatentTitleYear
10,825,858Image pickup element, image pickup apparatus, and method of manufacturing image pickup element202010,504,953Solid-state imaging device, manufacturing method of solid-state imaging device, and electronic device201910,418,404Solid-state imaging device, manufacturing method of solid-state imaging device, and electronic device201910,332,921Solid-state image sensing device and method for manufacturing the same, and electronic device201910,306,166Solid-state imaging device, manufacturing method thereof, camera, and electronic device201910,192,912Solid-state imaging device, manufacturing method of solid-state imaging device, and electronic device201910,128,291Solid-state imaging device, manufacturing method of solid-state imaging device, and electronic device201810,096,638Solid-state imaging device, manufacturing method of solid-state imaging device, and electronic device20189,923,010'Solid-state imaging device, manufacturing method of solid-state imaging device, and electronic device'20189,887,219'Solid-state imaging device, manufacturing method of solid-state imaging device, and electronic device'20189,673,235'Solid-state imaging device, manufacturing method of solid-state imaging device, and electronic device'20179,661,194'Solid-state imaging device, manufacturing method thereof, camera, and electronic device'20179,595,557'Solid-state imaging device, manufacturing method of solid-state imaging device, and electronic device'20179,502,450'Solid-state imaging device, manufacturing method of solid-state imaging device, and electronic device'20169,349,816'Method of manufacturing semiconductor device with offset sidewall structure'20169,214,464'Method of manufacturing semiconductor device with offset sidewall structure'20158,987,081'Method of manufacturing semiconductor device with offset sidewall structure'20158,872,953'Solid-state imaging device, manufacturing method thereof, camera, and electronic device'20148,859,360'Method of manufacturing semiconductor device with offset sidewall structure'20148,642,418'Method of manufacturing semiconductor device with offset sidewall structure'20148,541,272'Method of manufacturing semiconductor device with offset sidewall structure'20138,487,388'Solid-state image pickup apparatus, method for manufacturing same, and electronic device'20138,415,213'Method of manufacturing semiconductor device with offset sidewall structure'20137,998,802'Method of manufacturing semiconductor device with offset sidewall structure'20117,563,663'Method of manufacturing semiconductor device with offset sidewall structure'20097,531,402'Method of manufacturing semiconductor device with offset sidewall structure'20097,220,637'Method of manufacturing semiconductor device with offset sidewall structure'20077,170,109'Heterojunction semiconductor device with element isolation structure'20077,109,553'Semiconductor device and method of manufacturing same'20066,806,537'Semiconductor device having offset insulation film formed on insulation film, and method of manufacturing the same'20046,521,517'Method of fabricating a gate electrode using a second conductive layer as a mask in the formation of an insulating layer by oxidation of a first conductive layer'20036,521,963'Semiconductor device and method of manufacturing semiconductor device'20036,436,777'Semiconductor device and manufacturing method thereof'20026,248,653'Method of manufacturing gate structure'2001

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2001–2003Patents assigned to MITSUBISHI ELECTRIC CORP (4)· patent assignee history
2001–2020Based in Tokyo, JP· patent location history
2004–2009Patents assigned to RENESAS TECH CORP (6)· patent assignee history
2011–2016Patents assigned to RENESAS ELECTRONICS CORP (8)· patent assignee history
2013–2020Patents assigned to SONY CORP (11)· patent assignee history
2013–2016Patents assigned to OTA KAZUNOBU (4)· patent assignee history
2013–2019Based in Kanagawa, JP· patent location history
2016–2019Based in Kumamoto, JP· patent location history
2019Based in Nagasaki, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SONY CORP112013–2020
RENESAS ELECTRONICS CORP82011–2016
RENESAS TECH CORP62004–2009
MITSUBISHI ELECTRIC CORP42001–2003
OTA KAZUNOBUself42013–2016
Locations
LocationPatentsSpan
Tokyo, JP212001–2020
Kumamoto, JP82016–2019
Kanagawa, JP42013–2019
Nagasaki, JP12019