Inventor
Jacek Korec
Inventor
San Jose, CA, US
Overview
Patents· 56 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices50%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1021%
H01LSemiconductor devices11%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests8%
H01GCapacitors4%
H02JElectric power networks3%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h103%
H03KPulse technique1%
Y10TTechnical subjects covered by former us classification1%
PatentTitleYear
10,629,723Schottky power MOSFET202010,290,703Power device integration on a common substrate201910,290,702Power device on bulk substrate20199,941,383Fast switching IGBT with embedded emitter shorting contacts and method for making same20189,825,124'Power device integration on a common substrate'20179,412,881'Power device integration on a common substrate'20169,385,196'Fast switching IGBT with embedded emitter shorting contacts and method for making same'20169,324,858'Trench-gated MIS devices'20169,246,355'MOS transistor device in common source configuration'20169,136,060'Precision high-frequency capacitor formed on semiconductor substrate'20158,994,115'Power device integration on a common substrate'20158,994,105'Power device integration on a common substrate'20158,928,116'Power device integration on a common substrate'20158,847,310'Power device integration on a common substrate'20148,722,503'Capacitors and methods of forming'20148,692,324'Semiconductor devices having charge balanced structure'20148,674,440'Power device integration on a common substrate'20148,629,019'Method of forming self aligned contacts for a power MOSFET'20148,614,480'Power MOSFET with integrated gate resistor and diode-connected MOSFET'20138,552,585'MOS transistor device in common source configuration'20138,547,162'Integration of MOSFETs in a source-down configuration'20138,367,500'Method of forming self aligned contacts for a power MOSFET'20138,324,711'Precision high-frequency capacitor formed on semiconductor substrate'20128,004,063'Precision high-frequency capacitor formed on semiconductor substrate'20117,952,145'MOS transistor device in common source configuration'20117,868,381'Structures of and methods of fabricating trench-gated MIS devices'20117,745,846'LDMOS integrated Schottky diode'20107,642,164'Method of forming self aligned contacts for a power MOSFET'20107,589,378'Power LDMOS transistor'20097,560,808'Chip scale power LDMOS device'20097,446,375'Quasi-vertical LDMOS device having closed cell layout'20087,420,247'Power LDMOS transistor'20087,335,946'Structures of and methods of fabricating trench-gated MIS devices'20087,282,765'Power LDMOS transistor'20077,235,845'Power LDMOS transistor'20077,186,609'Method of fabricating trench junction barrier rectifier'20077,151,036'Precision high-frequency capacitor formed on semiconductor substrate'20067,005,347'Structures of and methods of fabricating trench-gated MIS devices'20066,858,471'Semiconductor substrate with trenches for reducing substrate resistance'20056,838,722'Structures of and methods of fabricating trench-gated MIS devices'20056,621,142'Precision high-frequency capacitor formed on semiconductor substrate'20036,621,143'Precision high-frequency capacitor on semiconductor substrate'20036,538,300'Precision high-frequency capacitor formed on semiconductor substrate'20036,534,366'Method of fabricating trench-gated power MOSFET'20036,392,290'Vertical structure for semiconductor wafer-level chip scale packages'20026,348,712'High density trench-gated power MOSFET'20026,285,060'Barrier accumulation-mode MOSFET'20016,118,141'Emitter-switched thyristor'20006,078,090'Trench-gated Schottky diode with integral clamping diode'20006,049,108'Trench-gated MOSFET with bidirectional voltage clamping'20005,923,055'Controllable semiconductor component'19995,747,831'SIC field-effect transistor array with ring type trenches and method of producing them'19985,710,444'Insulated gate bipolar transistor having a coupling element'19985,587,595'Lateral field-effect-controlled semiconductor device on insulating substrate'19965,488,236'Latch-up resistant bipolar transistor with trench IGFET and buried collector'19965,471,075'Dual-channel emitter switched thyristor with trench gate'1995Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1995–1998Based in Morfelden-Walldorf, DE· patent location history
1998Based in Moerfelden-Walldorf, DE· patent location history
1999–2016Based in San Jose, CA, US· patent location history
2000–2007Patents assigned to SILICONIX INC (8)· patent assignee history
2003–2012Patents assigned to VISHAY INTERTECHNOLOGY INC (5)· patent assignee history
2005–2016Patents assigned to VISHAY SILICONIX (10)· patent assignee history
2007–2020Based in Sunrise, FL, US· patent location history
2009–2020Patents assigned to TEXAS INSTRUMENTS INC (9)· patent assignee history
2012–2016Patents assigned to KOREC JACEK (11)· patent assignee history
2019Based in Cape Haze, FL, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| KOREC JACEKself | 11 | 2012–2016 |
| VISHAY SILICONIX | 10 | 2005–2016 |
| TEXAS INSTRUMENTS INC | 9 | 2009–2020 |
| SILICONIX INC | 8 | 2000–2007 |
| VISHAY INTERTECHNOLOGY INC | 5 | 2003–2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 25 | 1999–2016 |
| Sunrise, Florida, US | 24 | 2007–2020 |
| Morfelden-Walldorf, DE | 4 | 1995–1998 |
| Cape Haze, Florida, US | 2 | 2019 |
| Moerfelden-Walldorf, DE | 1 | 1998 |