Inventor
Kazuyoshi Maekawa
Inventor
Tokyo, JP
Overview
Patents· 39 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1034%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1018%
H01LSemiconductor devices14%
H10DInorganic electric semiconductor devices12%
C23CCoating metallic material6%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests6%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation4%
C22CAlloys2%
B60RVehicles, vehicle fittings, or vehicle parts, not otherwise provided for1%
B62DMotor vehicles1%
PatentTitleYear
11,091,107Connection unit and power supply system202110,665,502Semiconductor device with an interconnection layer and method of manufacturing the same202010,204,853Semiconductor device201910,192,755Semiconductor device and its manufacturing method201910,083,924Semiconductor device and manufacturing method thereof20189,972,505Semiconductor device and its manufacturing method20189,972,530Method of manufacturing semiconductor device including copper interconnections20189,607,956'Semiconductor device and method of manufacturing the same'20179,608,034'Manufacturing method of back illumination CMOS image sensor device using wafer bonding'20179,530,819'Manufacturing method of semiconductor integrated circuit device'20169,508,646'Semicondutor device with copper plugs having different resistance values'20169,406,628'Semiconductor device and method of manufacturing the same'20169,263,497'Manufacturing method of back illumination CMOS image sensor device using wafer bonding'20168,749,064'Semiconductor device with a line and method of fabrication thereof'20148,709,939'Semiconductor device having a multilevel interconnect structure and method for fabricating the same'20148,432,037'Semiconductor device with a line and method of fabrication thereof'20138,304,908'Semiconductor device having a multilevel interconnect structure and method for fabricating the same'20128,222,146'Semiconductor device with a line and method of fabrication thereof'20128,125,085'Semiconductor device having wiring with oxide layer of impurity from the wiring'20127,936,069'Semiconductor device with a line and method of fabrication thereof'20117,709,388'Semiconductor device with a line and method of fabrication thereof'20107,709,955'Semiconductor device with a line and method of fabrication thereof'20107,564,133'Semiconductor device and method for fabricating the same'20097,538,030'Semiconductor device and method of manufacturing same'20097,479,446'Semiconductor device and method of manufacturing same'20097,371,681'Method of manufacturing a semiconductor device'20087,192,871'Semiconductor device with a line and method of fabrication thereof'20076,975,007'Semiconductor device including a polysilicon, barrier structure, and tungsten layer electrode'20056,864,183'Method for manufacturing a semiconductor device'20056,657,301'Contact structure, method of forming the same, semiconductor device, and method of manufacturing the same'20036,599,820'Method of producing a semiconductor device'20036,333,259'Semiconductor device and apparatus and method for manufacturing the same'20016,329,284'Manufacturing process of a semiconductor device'20016,171,957'Manufacturing method of semiconductor device having high pressure reflow process'20016,002,175'Semiconductor device with improved connection hole for embedding an electrically conductive layer portion'19995,712,140'Method of manufacturing interconnection structure of a semiconductor device'19985,565,708'Semiconductor device comprising composite barrier layer'19965,475,267'Multilayer interconnection structure for a semiconductor device'19955,313,100'Multilayer interconnection structure for a semiconductor device'1994Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1994–2003Patents assigned to MITSUBISHI ELECTRIC CORP (9)· patent assignee history
1994–2014Based in Hyogo, JP· patent location history
1999–2020Based in Tokyo, JP· patent location history
2003–2010Patents assigned to RENESAS TECH CORP (10)· patent assignee history
2011–2020Patents assigned to RENESAS ELECTRONICS CORP (17)· patent assignee history
2012–2013Patents assigned to MAEKAWA KAZUYOSHI (4)· patent assignee history
2012–2013Patents assigned to MORI KENICHI (3)· patent assignee history
2012–2014Based in Itami, JP· patent location history
2016–2018Based in Kanagawa, JP· patent location history
2018–2019Based in Ibaraki, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| RENESAS ELECTRONICS CORP | 17 | 2011–2020 |
| RENESAS TECH CORP | 10 | 2003–2010 |
| MITSUBISHI ELECTRIC CORP | 9 | 1994–2003 |
| MAEKAWA KAZUYOSHIself | 4 | 2012–2013 |
| MORI KENICHI | 3 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tokyo, JP | 15 | 1999–2020 |
| Hyogo, JP | 11 | 1994–2014 |
| Kanagawa, JP | 6 | 2016–2018 |
| Ibaraki, JP | 2 | 2018–2019 |
| Itami, JP | 2 | 2012–2014 |