Inventor
Andrew Harvey Barr
Inventor
Roseville, CA, US
Overview
Patents· 81 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing33%
H05KPrinted circuits17%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use10%
G01RMeasuring electric variables8%
H04LTransmission of digital information, e.g. telegraphic communication5%
H01RElectrically-conductive connections5%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
G11CStatic stores3%
H01PWaveguides2%
H02JElectric power networks2%
PatentTitleYear
8,826,288'Computing with both lock-step and free-step processor modes'20148,812,781'External state cache for computer processor'20148,597,091'System fan management based on system loading options for a system having replaceable electronics modules'20138,176,250'System and method for testing a memory'20127,797,134'System and method for testing a memory with an expansion card using DMA'20107,664,994'High-availability cluster node removal and communication'20107,613,961'CPU register diagnostic testing'20097,596,726'Method and apparatus for selecting a primary resource in a redundant subsystem'20097,586,946'Method and apparatus for automatically evaluating and allocating resources in a cell based system'20097,581,210'Compiler-scheduled CPU functional testing'20097,548,971'System and method for managing the operating frequency of blades in a bladed-system'20097,513,779'Connector having a bypass capacitor and method for reducing the impedance and length of a return-signal path'20097,487,399'System and method for testing a component in a computer system using frequency margining'20097,469,370'Enabling multiple testing devices'20087,428,655'Smart card for high-availability clustering'20087,424,624'Rack equipment power purchase plan supervision system and method'20087,418,367'System and method for testing a cell'20087,415,700'Runtime quality verification of execution units'20087,409,576'High-availability cluster with proactive maintenance'20087,389,435'System and method for the frequency management of computer systems to allow capacity on demand'20087,386,744'Rack equipment power pricing plan control system and method'20087,363,516'Rack equipment management system and method'20087,350,109'System and method for testing a memory using DMA'20087,337,018'Heat sink fan management based on performance requirements'20087,276,986'Method and apparatus for improving signal integrity in a high speed flex cable'20077,272,733'Method of providing dynamic power redundancy based on a difference of current power units and currently needed power units'20077,228,462'Cluster node status detection and communication'20077,228,460'Multi-state status reporting for high-availability cluster nodes'20077,222,246'Method for determining number of dynamically temperature-adjusted power supply units needed to supply power according to measure operating temperature of power supply units'20077,213,170'Opportunistic CPU functional testing with hardware compare'20077,206,969'Opportunistic pattern-based CPU functional testing'20077,206,960'Bus clock frequency management based on device load'20077,206,966'Fault-tolerant multi-core microprocessing'20077,198,094'Finned device for removing heat from an electronic component'20077,187,556'Power distribution system'20077,185,214'System and method for load dependent frequency and performance modulation in bladed systems'20077,147,514'Connector providing capacitive coupling'20067,149,913'Bus clock frequency management based on characteristics of an application program'20067,146,519'Bus clock frequency management based on device bandwidth characteristics'20067,145,775'Chassis conducted cooling thermal dissipation apparatus for servers'20067,146,530'Targeted fault tolerance by special CPU instructions'20067,146,511'Rack equipment application performance modification system and method'20067,124,315'Blade system for using multiple frequency synthesizers to control multiple processor clocks operating at different frequencies based upon user input'20067,100,056'System and method for managing processor voltage in a multi-processor computer system for optimized performance'20067,082,032'Heat dissipation device with tilted fins'20067,079,390'System and method for heat dissipation and air flow redirection in a chassis'20067,080,263'Voltage management of processors in a bladed system based on number of loaded processors'20067,076,671'Managing an operating frequency of processors in a multi-processor computer system'20067,072,788'System and method for testing an interconnect in a computer system'20067,058,828'System, method and apparatus for the frequency management of blades in a bladed architecture based on performance requirements'20067,055,044'System and method for voltage management of a processor to optimize performance and power dissipation'20067,039,539'Rack equipment environmental condition adjustment system and method'20067,026,545'Flex cable having a return-signal path and method for reducing length and impedance of a return-signal path'20066,995,581'Apparatus and method for detecting and rejecting high impedance failures in chip interconnects'20066,985,826'System and method for testing a component in a computer system using voltage margining'20066,983,386'Voltage management of blades in a bladed architecture system based on thermal and power budget allocation'20066,970,054'Apparatus for terminating transmission lines to reduce electromagnetic interference in an electronic system'20056,970,001'Variable impedance test probe'20056,967,850'Supporting a short printed circuit card'20056,961,242'System fan management based on system loading options for a system having replaceable electronics modules'20056,957,544'Method and apparatus for regulating the operating temperature of electronic devices'20056,948,043'Management of a memory subsystem'20056,940,727'Card guide that comprises card guide portions that serve to guide a circuit board into a chassis'20056,940,288'Apparatus and method for monitoring and predicting failures in system interconnect'20056,937,039'Tip and tip assembly for a signal probe'20056,933,853'Apparatus and method for detecting and communicating interconnect failures'20056,928,589'Node management in high-availability cluster'20056,919,813'Built-in circuitry and method to test connector loading'20056,913,069'Cooling device having fins arranged to funnel air'20056,896,539'Pivot component coupled with first circuit board for control of relative alignment of first circuit board connection component with second circuit board connection component'20056,895,353'Apparatus and method for monitoring high impedance failures in chip interconnects'20056,879,173'Apparatus and method for detecting and rejecting high impedance failures in chip interconnects'20056,856,518'Assembly for supporting a short printed circuit card'20056,843,660'Cable systems and related methods'20056,812,719'Electronic probe with a tip that is securable to an electronic device'20046,798,661'Chassis conducted cooling thermal dissipation apparatus for servers'20046,791,843'Parallel board connection system and method'20046,767,220'Systems and methods for interconnecting electronic components'20046,680,853'Systems and methods for mounting components to circuit assemblies'20046,676,417'Systems and methods for interconnecting electronic components'20046,559,733'Reducing effects of electrical impedance'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003–2014Based in Roseville, CA, US· patent location history
2004–2014Patents assigned to HEWLETT PACKARD DEVELOPMENT CO (79)· patent assignee history
2012–2014Patents assigned to BARR ANDREW H (4)· patent assignee history
2012–2014Patents assigned to POMARANSKI KEN G (3)· patent assignee history
2012–2014Patents assigned to SHIDLA DALE J (2)· patent assignee history
2013Patents assigned to ESPINOZA-IBARRA RICARDO (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| HEWLETT PACKARD DEVELOPMENT CO | 79 | 2004–2014 |
| BARR ANDREW Hself | 4 | 2012–2014 |
| POMARANSKI KEN G | 3 | 2012–2014 |
| SHIDLA DALE J | 2 | 2012–2014 |
| ESPINOZA-IBARRA RICARDO | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Roseville, California, US | 81 | 2003–2014 |