Inventor
Michael Launsbach
Inventor
Rochester, MN, US
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores28%
G06FElectric digital data processing13%
H03KPulse technique10%
H10DInorganic electric semiconductor devices10%
H01LSemiconductor devices8%
C22CAlloys5%
H10BElectronic memory devices5%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
C22FChanging the physical structure of non-ferrous metals and non-ferrous alloys3%
F01DNon-positive displacement machines or engines, e.g. steam turbines3%
PatentTitleYear
9,312,858'Level shifter for a time-varying input'20169,287,873'Level shifter for a time-varying input'20169,218,880'Partial update in a ternary content addressable memory'20159,196,671'Integrated decoupling capacitor utilizing through-silicon via'20159,153,638'Integrated decoupling capacitor utilizing through-silicon via'20159,142,560'Layout to minimize FET variation in small dimension photolithography'20159,082,484'Partial update in a ternary content addressable memory'20159,058,861'Power management SRAM write bit line drive circuit'20158,860,141'Layout to minimize FET variation in small dimension photolithography'20148,842,487'Power management domino SRAM bit line discharge circuit'20148,824,196'Single cycle data copy for two-port SRAM'20148,711,606'Data security for dynamic random access memory using body bias to clear data at power-up'20148,675,427'Implementing RC and coupling delay correction for SRAM'20148,669,800'Implementing power saving self powering down latch structure'20148,578,304'Implementing mulitple mask lithography timing variation mitigation'20138,520,429'Data dependent SRAM write assist'20138,467,230'Data security for dynamic random access memory using body bias to clear data at power-up'20138,241,560'Nickel base superalloy and single crystal castings'20126,944,099'Precise time period measurement'20056,933,743'Dual mode analog differential and CMOS logic circuit'20056,120,624'Nickel base superalloy preweld heat treatment'2000Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2000Based in Newport News, VA, US· patent location history
2005–2016Patents assigned to IBM (19)· patent assignee history
2005–2016Based in Rochester, MN, US· patent location history
2012Based in Yorktown, VA, US· patent location history
2013–2014Patents assigned to LAUNSBACH MICHAEL (7)· patent assignee history
2013–2014Patents assigned to BEHRENDS DERICK G (5)· patent assignee history
2013–2014Patents assigned to CHRISTENSEN TODD A (5)· patent assignee history
2013–2014Patents assigned to HEBIG TRAVIS R (5)· patent assignee history
2015Based in Lakeville, MN, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 19 | 2005–2016 |
| LAUNSBACH MICHAELself | 7 | 2013–2014 |
| BEHRENDS DERICK G | 5 | 2013–2014 |
| CHRISTENSEN TODD A | 5 | 2013–2014 |
| HEBIG TRAVIS R | 5 | 2013–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Rochester, Minnesota, US | 18 | 2005–2016 |
| Lakeville, Minnesota, US | 1 | 2015 |
| Yorktown, Virginia, US | 1 | 2012 |
| Newport News, Virginia, US | 1 | 2000 |