Inventor

CHEN-SHIEN CHEN

Inventor
TW

Overview

74→
Patents
2021–2025
Patent span
Electricity
Primary field (CPC H)

Patents· 74 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary
H01LSemiconductor devices36%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1035%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1012%
H10DInorganic electric semiconductor devices7%
H01FMagnets4%
H10NElectric solid-state devices not otherwise provided for2%
Y10TTechnical subjects covered by former us classification2%
G01RMeasuring electric variables0%
H02JElectric power networks0%
H05KPrinted circuits0%
PatentTitleYear
12,494,379Heterogeneous bonding structure and method forming same202512,451,396Semiconductor package and method of forming same202512,444,706Package bonding structures and method of formation202512,388,003Chip package structure with metal-containing layer202512,376,317Semiconductor device structure with magnetic element202512,368,120Semiconductor device and method202512,347,722Semiconductor device structure with a protection cap at an end portion of a conductive line202512,334,476Semiconductor device with discrete blocks202512,334,489Lthc as charging barrier in info package formation202512,327,782Systems for semiconductor package mounting with improved co-planarity202512,300,652Substrate and package structure202512,300,644Die bonding pads and methods of forming the same202512,293,951Semiconductor package structure having ring portion with recess for adhesive202512,159,812Method of forming semiconductor device202412,131,974Semiconductor package and method of manufacturing semiconductor package202412,125,715Chip package structure with nickel layer202412,119,276Package structure with protective lid202412,119,237Semiconductor device package having metal thermal interface material202412,113,055Stress reduction apparatus and method202412,087,718Bump structure having a side recess and semiconductor structure including the same202412,074,193Semiconductor device structure with magnetic element202412,051,634Package and package-on-package structure having elliptical columns and ellipsoid joint terminals202412,046,588Package on package structure202412,040,289Interposer including a copper edge seal ring structure and methods of forming the same202412,027,435Packages including multiple encapsulated substrate blocks and overlapping redistribution structures202412,019,097Method for forming probe head structure202412,002,746Chip package structure with metal-containing layer202411,984,419Package structure with a barrier layer202411,978,720Semiconductor device package and methods of manufacture202411,961,791Package structures and methods for forming the same202411,961,810Solderless interconnection structure and method of forming same202411,923,353LTHC as charging barrier in info package formation202411,908,885Semiconductor device structure with magnetic element202411,894,332Substrate and package structure202411,894,241Heterogeneous bonding structure and method forming same202411,862,588Semiconductor device and method202411,855,025Semiconductor device and package assembly including the same202311,854,835Heterogeneous bonding structure and method forming same202311,855,045Semiconductor device with discrete blocks202311,842,935Method for forming a reconstructed package substrate comprising substrates blocks202311,824,026Connector structure and method of forming same202311,764,118Structure and formation method of chip package with protective lid202311,764,168Chip package structure with anchor structure and method for forming the same202311,756,849Package and package-on-package structure having elliptical columns and ellipsoid joint terminals202311,749,711Semiconductor device structure with magnetic element202311,749,575Semiconductor package structure having ring portion with recess for adhesive and method for forming the same202311,742,217Passive devices in package-on-package structures and methods for forming the same202311,742,218Semiconductor device package having metal thermal interface material and method for forming the same202311,728,180Chip package structure with conductive adhesive layer202311,682,651Bump-on-trace interconnect202311,658,143Bump-on-trace design for enlarge bump-to-trace distance202311,631,993Wireless charging devices having wireless charging coils and methods of manufacture thereof202311,631,648Bump structure having a side recess and semiconductor structure including the same202311,621,317Semiconductor device structure with magnetic element covered by polymer material202311,557,508Semiconductor device structure having protection caps on conductive lines202311,488,878Packaging mechanisms for dies with different sizes of connectors202211,476,125Multi-die package with bridge layer202211,469,203Method for forming package structure with a barrier layer202211,437,361LTHC as charging barrier in InFO package formation202211,404,341Package and package-on-package structure having elliptical columns and ellipsoid joint terminals202211,387,168Semiconductor devices202211,387,171Method of packaging a semiconductor die202211,342,253Package structures and methods for forming the same202211,335,634Chip package structure and method for forming the same202211,329,124Semiconductor device structure with magnetic element202211,329,008Method for manufacturing semiconductor package for warpage control202211,315,896Conical-shaped or tier-shaped pillar connections202211,302,537Chip package structure with conductive adhesive layer and method for forming the same202211,257,797Package on package structure202211,244,919Package structure and method of fabricating the same202211,244,940Stress reduction apparatus and method202211,233,116Semiconductor device structure with magnetic element202211,217,562Semiconductor device with discrete blocks202211,152,319Micro-connection structure and manufacturing method thereof2021

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2021–2025Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (74)· patent assignee history
2021–2025Based in TW· patent location history
2022Based in CN· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG CO LTD742021–2025
Locations
LocationPatentsSpan
TW732021–2025
CN12022