Inventor
Yung-Feng Lin
Inventor
Taoyuan, TW
Overview
Patents· 53 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores55%
H03KPulse technique11%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems9%
H10DInorganic electric semiconductor devices5%
G06FElectric digital data processing3%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications3%
E05DHinges or suspension devices for doors, windows or wings2%
E05YIndexing scheme associated with subclasses e05d and e05f, relating to construction elements, electric control, power supply, power signal or transmission, user interfaces, mounting or coupling, details, accessories, auxiliary operations not otherwise provided for, application thereof2%
G02FOptical devices or arrangements for the control of light by modification of the optical properties of the media of the elements involved therein2%
PatentTitleYear
10,297,316Phase change memory apparatus and read control method to reduce read disturb and sneak current phenomena20199,412,425'Device and method for improving reading speed of memory'20169,214,859'Charge pump system'20159,170,601'Command decoding method and circuit of the same'20159,001,604'Device and method for improving reading speed of memory'20158,861,303'Circuit and method for address transition detection'20148,722,475'Method and structure for high Q varactor'20148,693,260'Memory array with two-phase bit line precharge'20148,659,327'High voltage sustainable output buffer'20148,624,981'Testing method for camera'20148,453,006'Command decoding method and circuit of the same'20138,446,182'TX output combining method between different bands'20138,411,509'Memory and method for charging a word line thereof'20138,395,200'Method and system for manufacturing copper-based capacitor'20138,350,981'Fixture component for liquid crystal display, liquid crystal display assembly and LCD fixture structure for liquid crystal display'20138,324,692'Integrated inductor'20128,302,808'Closure device with a pivoted door'20128,264,274'Non-volatile memory device and charge pump circuit for the same'20128,263,886'Key mechanism with waterproofing function and related electronic device'20128,264,900'Data sensing arrangement using first and second bit lines'20128,174,289'Level shifter and level shifting method thereof'20128,174,924'Power saving method and circuit thereof for a semiconductor memory'20128,111,547'Multi-bit flash memory and reading method thereof'20128,085,611'Twisted data lines to avoid over-erase cell result coupling to normal cell result'20118,085,086'Non-volatile memory device and charge pump circuit for the same'20118,077,528'Low couple effect bit-line voltage generator'20118,045,396'Memory and reading method thereof'20118,040,734'Current-mode sense amplifying method'20117,961,513'Method for programming a multilevel memory'20117,863,934'Adjusting method and circuit using the same'20117,852,699'Power saving method and circuit thereof for a semiconductor memory'20107,830,721'Memory and reading method thereof'20107,791,372'Level shifter and level shifting method thereof'20107,787,298'Method for preventing memory from generating leakage current and memory thereof'20107,786,761'Output buffer device'20107,738,296'Method for reading nonvolatile memory at power-on stage'20107,724,595'Current-mode sense amplifier and sense amplifying method'20107,697,350'Low couple effect bit-line voltage generator'20107,697,349'Word line boost circuit and method'20107,643,337'Multi-bit flash memory and reading method thereof'20107,599,220'Charge trapping memory and accessing method thereof'20097,580,292'Method for programming a multilevel memory'20097,518,924'NOR architecture memory and operation method thereof'20097,483,306'Fast and accurate sensing amplifier for low voltage semiconductor memory'20097,471,561'Method for preventing memory from generating leakage current and memory thereof'20087,468,600'Voltage regulation unit with Zener diode and voltage regulation device thereof'20087,463,539'Method for burst mode, bit line charge transfer and memory using the same'20087,447,068'Method for programming a multilevel memory'20087,339,846'Method and apparatus for reading data from nonvolatile memory'20087,330,020'Voltage regulation unit with zener diode and voltage regulation device thereof'20087,236,061'Temperature compensated refresh clock circuit for memory circuits'20077,218,563'Method and apparatus for reading data from nonvolatile memory'20076,618,848'Method for designing circuit layout of non-neighboring metal bit lines to reduce coupling effect'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003–2019Patents assigned to MACRONIX INT CO LTD (46)· patent assignee history
2003–2007Based in Hsinchu, TW· patent location history
2007–2019Based in Taoyuan, TW· patent location history
2009–2016Based in Taoyuan County, TW· patent location history
2011–2015Patents assigned to LIN YUNG FENG (9)· patent assignee history
2011–2013Patents assigned to CHANG KUEN-LONG (3)· patent assignee history
2012–2014Patents assigned to LIN YUNG-FENG (12)· patent assignee history
2012–2015Patents assigned to HUNG CHUN-HSIUNG (4)· patent assignee history
2012–2014Based in Shanghai, CN· patent location history
2012–2013Based in Taipei, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MACRONIX INT CO LTD | 46 | 2003–2019 |
| LIN YUNG-FENGself | 12 | 2012–2014 |
| LIN YUNG FENGself | 9 | 2011–2015 |
| HUNG CHUN-HSIUNG | 4 | 2012–2015 |
| CHANG KUEN-LONG | 3 | 2011–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Taoyuan, TW | 25 | 2007–2019 |
| Taoyuan County, TW | 18 | 2009–2016 |
| Shanghai, CN | 3 | 2012–2014 |
| Taipei, TW | 3 | 2012–2013 |
| Hsinchu, TW | 2 | 2003–2007 |