Inventor
Yong Chul Shin
Inventor
Amherst, NY, US
Overview
Patents· 18 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Nprimary
G06NComputing arrangements based on specific computational models8%
H01LSemiconductor devices8%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
B01JChemical or physical processes, e.g. catalysis or colloid chemistry5%
C12NMicroorganisms or enzymes5%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices5%
G06VImage or video recognition or understanding5%
H04LTransmission of digital information, e.g. telegraphic communication5%
H10BElectronic memory devices5%
PatentTitleYear
10,911,908Electronic device for processing message and method for operating same202110,766,933Mutated immunoglobulin-binding protein having increased alkaline tolerance202010,475,646Process for producing of polycrystalline silicon201910,366,264System and method for transferring content among devices201910,211,152Semiconductor device and method of manufacturing the same20199,768,114'Semiconductor device and method of manufacturing the same'20177,964,491'Method of forming metal wiring of nonvolatile memory device'20117,955,985'Method of forming micro pattern of semiconductor device'20117,592,168'Cephalosporin C acylase mutant and method for preparing 7-ACA using same'20097,580,551'Method and apparatus for analyzing and/or comparing handwritten and/or biometric samples'20097,005,329'Method for manufacturing semiconductor device'20066,955,879'Method for generating recombinant DNA library using unidirectional single-stranded DNA fragments'20056,329,106'Repair method for phase shift mask in semiconductor device'20015,535,309'Single layer neural network circuit for performing linearly separable and non-linearly separable logical operations'19965,524,070'Local adaptive contrast enhancement'19965,355,436'Single layer neural network circuit for performing linearly separable and non-linearly separable logical operations'19945,336,937'Programmable analog synapse and neural networks incorporating same'19945,257,220'Digital data memory unit and memory unit array'1993Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1993–2009Patents assigned to UNIV NEW YORK STATE RES FOUND (3)· patent assignee history
1993–1996Based in Amherst, NY, US· patent location history
1994–1996Patents assigned to RES FOUNDATION STATE UNIVERSIT (2)· patent assignee history
2005–2020Patents assigned to AMICOGEN INC (2)· patent assignee history
2005–2009Based in Jinju-si, KR· patent location history
2006–2011Patents assigned to HYNIX SEMICONDUCTOR INC (3)· patent assignee history
2006–2020Based in Kyungki-do, KR· patent location history
2017–2019Patents assigned to SK HYNIX INC (2)· patent assignee history
2017–2021Based in Gyeonggi-do, KR· patent location history
2019Based in Daejeon, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| HYNIX SEMICONDUCTOR INC | 3 | 2006–2011 |
| UNIV NEW YORK STATE RES FOUND | 3 | 1993–2009 |
| AMICOGEN INC | 2 | 2005–2020 |
| RES FOUNDATION STATE UNIVERSIT | 2 | 1994–1996 |
| SK HYNIX INC | 2 | 2017–2019 |
Locations
| Location | Patents | Span |
|---|---|---|
| Amherst, New York, US | 5 | 1993–1996 |
| Gyeonggi-do, KR | 4 | 2017–2021 |
| Kyungki-do, KR | 2 | 2006–2020 |
| Jinju-si, KR | 2 | 2005–2009 |
| Daejeon, KR | 1 | 2019 |