Inventor
Kazuya Okubo
Inventor
Yokohama, JP
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1024%
H10DInorganic electric semiconductor devices22%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1020%
C23CCoating metallic material11%
C08LCompositions of macromolecular compounds4%
A01NPreservation of bodies of humans or animals or plants or parts thereof2%
B27KProcesses, apparatus or selection of substances for impregnating, staining, dyeing, bleaching of wood or similar materials, or treating of wood or similar materials with permeant liquids, not otherwise provided for2%
C08JWorking-up2%
C08KUse of inorganic or non-macromolecular organic substances as compounding ingredients2%
G01NInvestigating or analysing materials by determining their chemical or physical properties2%
PatentTitleYear
9,823,180'Method for measuring resistance of conveyor belt to getting over support roller, and device therefor'20179,551,068'Film forming method and film forming apparatus'20179,074,096'Polyphenylene sulfide resin composition and molding comprising same'20158,889,505'Method for manufacturing semiconductor device'20148,575,704'Semiconductor device and manufacturing method of the semiconductor device'20138,551,832'Method for manufacturing semiconductor device'20138,536,708'Method of manufacturing a semiconductor device and semiconductor device'20138,338,953'Method of manufacturing a semiconductor device and semiconductor device'20128,148,262'Method for manufacturing semiconductor device'20128,030,207'Method of manufacturing a semiconductor device and semiconductor device'20117,592,256'Method of forming tungsten film'20096,913,996'Method of forming metal wiring and semiconductor manufacturing apparatus for forming metal wiring'20056,821,874'Method for depositing tungsten silicide film and method for preparing gate electrode/wiring'20046,489,208'Method of forming a laminated structure to enhance metal silicide adhesion on polycrystalline silicon'20026,404,021'Laminated structure and a method of forming the same'20026,251,188'Apparatus for forming laminated thin films or layers'20016,245,673'Method of forming tungsten silicide film'20016,022,586'Method and apparatus for forming laminated thin films or layers'20005,300,520'Wood preservative composition'1994Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2000–2017Patents assigned to TOKYO ELECTRON LTD (9)· patent assignee history
2000–2002Based in Yamanashi, JP· patent location history
2004–2005Based in Nirasaki, JP· patent location history
2009–2017Based in Tokyo, JP· patent location history
2011–2014Patents assigned to FUJITSU SEMICONDUCTOR LTD (7)· patent assignee history
2011–2013Based in Kawasaki, JP· patent location history
2012–2015Patents assigned to OKUBO KAZUYA (6)· patent assignee history
2012–2013Patents assigned to AKIYAMA SHINICHI (4)· patent assignee history
2012–2013Patents assigned to KAWAMURA KAZUO (2)· patent assignee history
2012–2014Based in Yokohama, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TOKYO ELECTRON LTD | 9 | 2000–2017 |
| FUJITSU SEMICONDUCTOR LTD | 7 | 2011–2014 |
| OKUBO KAZUYAself | 6 | 2012–2015 |
| AKIYAMA SHINICHI | 4 | 2012–2013 |
| KAWAMURA KAZUO | 2 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Yokohama, JP | 4 | 2012–2014 |
| Yamanashi, JP | 4 | 2000–2002 |
| Kawasaki, JP | 3 | 2011–2013 |
| Tokyo, JP | 2 | 2009–2017 |
| Nirasaki, JP | 2 | 2004–2005 |