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Inventor

Robert L. Hinton

Inventor
Hillsboro, OR, US

Overview

6→
Patents
2008–2016
Patent span
Physics
Primary field (CPC G)

Patents· 6 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing100%
PatentTitleYear
9,348,591'Multi-level tracking of in-use state of cache lines'20169,158,696'Hiding instruction cache miss latency by running tag lookups ahead of the instruction accesses'20159,146,745'Method and apparatus for partitioned pipelined execution of multiple execution threads'20157,797,683'Decoupling the number of logical threads from the number of simultaneous physical threads in a processor'20107,533,252'Overriding a static prediction with a level-two predictor'20097,454,596'Method and apparatus for partitioned pipelined fetching of multiple execution threads'2008

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2008–2016Patents assigned to INTEL CORP (6)· patent assignee history
2008–2015Based in Hillsborough, OR, US· patent location history
2009–2016Based in Hillsboro, OR, US· patent location history
2015–2016Patents assigned to FARCY ALEXANDRE J (2)· patent assignee history
2015–2016Patents assigned to HINTON ROBERT L (2)· patent assignee history
2015–2016Patents assigned to KHOR CHOON WEI (2)· patent assignee history
2015–2016Patents assigned to KIM ILHYUN (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTEL CORP62008–2016
FARCY ALEXANDRE J22015–2016
HINTON ROBERT Lself22015–2016
KHOR CHOON WEI22015–2016
KIM ILHYUN22015–2016
Locations
LocationPatentsSpan
Hillsboro, OR, US42009–2016
Hillsborough, OR, US22008–2015