Inventor
Bing Dang
Inventor
Chappaqua, NY, US
Overview
Patents· 106 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1018%
H01LSemiconductor devices16%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
H05KPrinted circuits5%
B23KSoldering or unsoldering5%
G01RMeasuring electric variables4%
Y10TTechnical subjects covered by former us classification4%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution2%
H01QAntennas, i.e. radio aerials2%
Y02PClimate change mitigation technologies in the production or processing of goods2%
PatentTitleYear
11,121,005Handler bonding and debonding for semiconductor dies202111,101,513Thin film battery packaging202111,094,407Electronics miniaturization platform for medication verification and tracking202110,833,296Thin film solid-state microbattery packaging202010,824,822Magnetic tracking for medicine management202010,687,425Method of forming a plurality of electro-optical module assemblies202010,679,018Magnetic tracking for medicine management202010,679,887Handler bonding and debonding for semiconductor dies202010,670,656Integrated electro-optical module assembly202010,658,182Chip handling and electronic component integration202010,651,507Miniaturized electronics package with patterned thin film solid state battery202010,651,036Chip handling and electronic component integration202010,638,945Transdermal sensing probes and smart patch systems using same202010,636,837Solution deposited magnetically guided chiplet displacement202010,638,613Method of forming a plurality of electro-optical module assemblies202010,637,101Miniaturized electronics package with patterned thin film solid state battery202010,630,592Routing method, related device, and system202010,586,726Handler bonding and debonding for semiconductor dies202010,573,625Vertical light emitting diode with magnetic back contact202010,573,538Handler bonding and debonding for semiconductor dies202010,559,555Micro-LED array transfer202010,546,836Wafer level integration including design/co-design, structure process, equipment stress management and thermal management202010,522,406IR assisted fan-out wafer level packaging using silicon handler201910,522,383Thermoplastic temporary adhesive for silicon handler with infra-red laser wafer de-bonding201910,505,160Micro-battery using glass package201910,490,525High speed handling of ultra-small chips by selective laser bonding and debonding201910,407,791Selective solder plating201910,396,220Device layer thin-film transfer to thermally conductive substrate201910,395,929Chip handling and electronic component integration201910,393,798Integrated electro-optical module assembly201910,381,255Double layer release temporary bond and debond processes and systems201910,361,140Wafer stacking for integrated circuit manufacturing201910,330,701Test probe head for full wafer testing201910,325,785Handler bonding and debonding for semiconductor dies201910,319,893Magnetically guided chiplet displacement201910,314,970Drug delivery device having a cavity sealed by a pressurized membrane201910,297,479Wafer debonding using mid-wavelength infrared radiation ablation201910,286,198Microchip medical substance delivery devices201910,243,091Device layer thin-film transfer to thermally conductive substrate201910,229,288Enhanced data security platform201910,224,219Handler bonding and debonding for semiconductor dies201910,224,229Double layer release temporary bond and debond processes and systems201910,217,637Chip handling and electronic component integration201910,147,694Direct injection molded solder process for forming solder bumps on wafers201810,132,836Method of forming surface protrusions on an article and the article with the protrusions attached201810,115,711Vertical light emitting diode with magnetic back contact201810,103,450Integration of area efficient antennas for phased array or wafer scale array antenna applications201810,062,622Electrolytic seal201810,056,672Waveguide including first and second metal plates and having a slotted feed to waveguide transition disposed in the first metallic plate201810,056,310Electrolytic seal201810,038,232Semiconductor wafer including an integrated waveguide for communicating signals between first and second integrated circuit dies201810,032,943Device layer thin-film transfer to thermally conductive substrate201810,032,973Magnetically guided chiplet displacement201810,033,081Package structure including a package substrate having an integrated waveguide coupled to first and second integrated circuits, where the package substrate is mounted to an application board201810,002,856Micro-LED array transfer20189,947,570Handler bonding and debonding for semiconductor dies20189,947,567Thermoplastic temporary adhesive for silicon handler with infra-red laser wafer de-bonding20189,937,124Microchip substance delivery devices having low-power electromechanical release mechanisms20189,935,009IR assisted fan-out wafer level packaging using silicon handler20189,897,627'Test probe substrate'20189,893,047'Manufacture of wafer—panel die package assembly technology'20189,867,932'Drug delivery device having a cavity sealed by a pressurized membrane'20189,872,394'Substrate via filling'20189,865,569'Planarity-tolerant reworkable interconnect with integrated testing'20189,851,379Test probe substrate20179,820,395'Low cost hermetic micro-electronics'20179,798,886'Bio-medical sensing platform'20179,721,864'Low cost hermetic micro-electronics'20179,691,747'Manufacture of wafer—panel die package assembly technology'20179,636,782'Wafer debonding using mid-wavelength infrared radiation ablation'20179,636,783'Method and apparatus for laser dicing of wafers'20179,606,142'Test probe substrate'20179,586,291'Adhesives for bonding handler wafers to device wafers and enabling mid-wavelength infrared laser ablation release'20179,537,199'Package structure having an integrated waveguide configured to communicate between first and second integrated circuit chips'20179,531,052'Semiconductor wafer having an integrated waveguide configured to communicate between first and second integrated circuit dies'20169,508,566'Wafer level overmold for three dimensional surfaces'20169,472,859'Integration of area efficient antennas for phased array or wafer scale array antenna applications'20169,472,789'Thin, flexible microsystem with integrated energy source'20169,433,101'Substrate via filling'20169,391,040'Planarity-tolerant reworkable interconnect with integrated testing'20169,364,925'Assembly of electronic and optical devices'20169,273,408'Direct injection molded solder process for forming solder bumps on wafers'20169,269,561'Wafer debonding using long-wavelength infrared radiation ablation'20169,200,883'Transferable probe tips'20159,171,749'Handler wafer removal facilitated by the addition of an amorphous carbon layer on the handler wafer'20159,070,586'Method of forming surface protrusions on an article and the article with the protrusions attached'20158,927,988'Self-sealed fluidic channels for a nanopore array'20158,917,210'Package structures to improve on-chip antenna performance'20148,912,045'Three dimensional flip chip system and method'20148,752,283'Assembly of electronic and optical devices'20148,703,274'Microcavity structure and process'20148,689,437'Method for forming integrated circuit assembly'20148,679,280'Laser ablation of adhesive for integrated circuit fabrication'20148,559,474'Silicon carrier optoelectronic packaging'20138,525,168'Integrated circuit (IC) test probe'20138,518,829'Self-sealed fluidic channels for nanopore array'20138,419,895'Laser ablation for integrated circuit fabrication'20138,388,782'Handler attachment for integrated circuit fabrication'20138,342,385'Process for mapping formic acid distribution'20138,328,156'Techniques for forming solder bump interconnects'20128,290,008'Silicon carrier optoelectronic packaging'20128,148,255'Techniques for forming solder bump interconnects'20127,928,563'3-D ICs with microfluidic interconnects and methods of constructing same'20117,799,613'Integrated module for data processing system'20107,750,459'Integrated module for data processing system'20107,474,540'Silicon carrier including an integrated heater for die rework and wafer probe'2009Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2009–2021Patents assigned to IBM (99)· patent assignee history
2009–2021Based in Chappaqua, NY, US· patent location history
2010–2014Based in Ossining, NY, US· patent location history
2012–2016Patents assigned to DANG BING (18)· patent assignee history
2012–2015Patents assigned to ANDRY PAUL S (4)· patent assignee history
2012–2013Patents assigned to GUERIN LUC (4)· patent assignee history
2012–2013Based in Yorktown Heights, NY, US· patent location history
2016–2018Patents assigned to GLOBALFOUNDRIES INC (5)· patent assignee history
2019Based in Chappaquah, NY, US· patent location history
2020Based in Beijing, CN· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 99 | 2009–2021 |
| DANG BINGself | 18 | 2012–2016 |
| GLOBALFOUNDRIES INC | 5 | 2016–2018 |
| ANDRY PAUL S | 4 | 2012–2015 |
| GUERIN LUC | 4 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Chappaqua, New York, US | 96 | 2009–2021 |
| Ossining, New York, US | 3 | 2010–2014 |
| Chappaquah, New York, US | 2 | 2019 |
| Yorktown Heights, New York, US | 2 | 2012–2013 |
| Beijing, CN | 1 | 2020 |