Inventor
Andrew K. Martin
Inventor
Austin, TX, US
Overview
Patents· 27 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing35%
H03MCoding22%
H04LTransmission of digital information, e.g. telegraphic communication11%
G01RMeasuring electric variables7%
G11CStatic stores4%
B64CAeroplanes2%
B64DEquipment for fitting in or to aircraft2%
B64UUnmanned aerial vehicles [uav]2%
F41GWeapon sights2%
G01CMeasuring distances, levels or bearings2%
PatentTitleYear
11,112,787Machine to machine targeting maintaining positive identification202111,062,184Using augmented reality to perform complex print jobs202110,789,549Enforcing, with respect to changes in one or more distinguished independent variable values, monotonicity in the predictions produced by a statistical model202010,721,019Encoding variable length symbols to enable parallel decoding202010,367,604Encoding variable length symbols to enable parallel decoding20199,715,539'Efficient context save/restore during hardware decompression of DEFLATE encoded data'20179,374,106'Efficient context save/restore during hardware decompression of DEFLATE encoded data'20169,176,888'Application-managed translation cache'20159,100,042'High throughput decoding of variable length data symbols'20159,088,297'High throughput decoding of variable length data symbols'20159,086,871'Reordering the output of recirculated transactions within a pipeline'20158,933,824'Hardware decompression of deflate encoded data with multiple blocks'20158,824,569'High bandwidth decompression of variable length encoded data streams'20148,804,852'High bandwidth decompression of variable length encoded data streams'20148,704,686'High bandwidth compression to encoded data streams'20148,527,708'Detecting address conflicts in a cache memory system'20138,495,311'Updating shared variables atomically'20137,734,970'Self-resetting, self-correcting latches'20107,590,907'Method and apparatus for soft-error immune and self-correcting latches'20097,418,641'Self-resetting, self-correcting latches'20087,415,645'Method and apparatus for soft-error immune and self-correcting latches'20087,383,480'Scanning latches using selecting array'20087,047,468'Method and apparatus for low overhead circuit scan'20067,046,094'Method and ring oscillator circuit for measuring circuit delays over a wide operating range'20066,931,611'Design verification system for avoiding false failures and method therefor'20056,378,112'Verification of design blocks and method of equivalence checking of multiple design views'20025,999,717'Method for performing model checking in integrated circuit design'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2020Based in Austin, TX, US· patent location history
2006–2020Patents assigned to IBM (21)· patent assignee history
2013–2014Patents assigned to MARTIN ANDREW K (4)· patent assignee history
2014Patents assigned to AGARWAL KANAK B (2)· patent assignee history
2014Patents assigned to HOFSTEE HARM P (2)· patent assignee history
2014Patents assigned to JAMSEK DAMIR A (2)· patent assignee history
2020Based in Seattle, WA, US· patent location history
2021Based in Encino, CA, US· patent location history
2021Based in Honeoye Falls, NY, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 21 | 2006–2020 |
| MARTIN ANDREW Kself | 4 | 2013–2014 |
| AGARWAL KANAK B | 2 | 2014 |
| HOFSTEE HARM P | 2 | 2014 |
| JAMSEK DAMIR A | 2 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Austin, Texas, US | 24 | 1999–2020 |
| Encino, California, US | 1 | 2021 |
| Honeoye Falls, New York, US | 1 | 2021 |
| Seattle, Washington, US | 1 | 2020 |