Inventor

Lucian A. D'Asaro

Inventor

Madison, NJ, US

Overview

16→

Patents

1979–2002

Patent span

Electricity

Primary field (CPC H)

Patents· 16 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Pprimary

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1024%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1018%

H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation12%

H01SDevices using the process of light amplification by stimulated emission of radiation [laser] to amplify or generate light9%

G02FOptical devices or arrangements for the control of light by modification of the optical properties of the media of the elements involved therein6%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests6%

B23KSoldering or unsoldering3%

B24BMachines, devices, or processes for grinding or polishing3%

C23CCoating metallic material3%

C25DProcesses for the electrolytic or electrophoretic production of coatings3%

PatentTitleYear

6,493,368'Lateral injection vertical cavity surface-emitting laser'2002 6,444,491'Composite semiconductor devices and method for manufacture thereof'2002 6,169,756'Vertical cavity surface-emitting laser with optical guide and current aperture'2001 6,048,751'Process for manufacture of composite semiconductor devices'2000 5,996,221'Method for thermocompression bonding structures'1999 5,918,794'Solder bonding of dense arrays of microminiature contact pads'1999 5,667,132'Method for solder-bonding contact pad arrays'1997 5,578,162'Integrated composite semiconductor devices and method for manufacture thereof'1996 5,298,454'Method for making self-electro-optical device and devices made thereby'1994 5,289,015'Planar fet-seed integrated circuits'1994 5,056,098'Vertical cavity laser with mirror having controllable reflectivity'1991 4,569,718'Method for plasma etching III-V semiconductors with a BCl.sub.3 -Cl.sub.2 gas'1986 4,403,241'Method for etching III-V semiconductors and devices made by this method'1983 4,399,004'Photoelectrochemical gold plating process'1983 4,244,775'Process for the chemical etch polishing of semiconductors'1981 4,162,337'Process for fabricating III-V semiconducting devices with electroless gold plating'1979

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1979–1983Patents assigned to BELL TELEPHONE LABOR INC (4)· patent assignee history

1979–2002Based in Madison, NJ, US· patent location history

1986–1994Patents assigned to AT & T BELL LAB (4)· patent assignee history

1996–2001Patents assigned to LUCENT TECHNOLOGIES INC (6)· patent assignee history

2002Patents assigned to AGERE SYST OPTOELECTRONICS (1)· patent assignee history

2002Patents assigned to AGERE SYSTEMS INC (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
LUCENT TECHNOLOGIES INC	6	1996–2001
AT & T BELL LAB	4	1986–1994
BELL TELEPHONE LABOR INC	4	1979–1983
AGERE SYST OPTOELECTRONICS	1	2002
AGERE SYSTEMS INC	1	2002

Locations

Location	Patents	Span
Madison, New Jersey, US	16	1979–2002