Inventor
Shinya Nishio
Inventor
Plano, TX, US
Overview
Patents· 5 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices33%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1025%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1025%
H10DInorganic electric semiconductor devices8%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests8%
PatentTitleYear
6,969,649'Method of manufacturing semiconductor integrated circuit devices having a memory device with a reduced bit line stray capacity and such semiconductor integrated circuit devices'20056,753,219'Method of manufacturing semiconductor integrated circuit devices having a memory device with a reduced bit line stray capacity and such semiconductor integrated circuit devices'20046,077,735'Method of manufacturing semiconductor device'20005,937,290'Method of manufacturing semiconductor integrated circuit devices using phase shifting mask'19995,732,009'Semiconductor integrated circuit device including a DRAM in which a cell selection transistor has a stabilized threshold voltage'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–2005Patents assigned to TEXAS INSTRUMENTS INC (5)· patent assignee history
1998–2004Patents assigned to HITACHI LTD (3)· patent assignee history
1998–2000Based in Musashimurayama, JP· patent location history
1999–2005Based in Plano, TX, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TEXAS INSTRUMENTS INC | 5 | 1998–2005 |
| HITACHI LTD | 3 | 1998–2004 |
Locations
| Location | Patents | Span |
|---|---|---|
| Plano, Texas, US | 3 | 1999–2005 |
| Musashimurayama, JP | 2 | 1998–2000 |