Inventor

Wei-Cheng Wu

Inventor

Hsinchu, TW

Overview

2010–2020

Patent span

Electricity

Primary field (CPC H)

Patents· 230 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary

H01LSemiconductor devices26%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1018%

H10DInorganic electric semiconductor devices17%

H10BElectronic memory devices13%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%

G11CStatic stores4%

G01RMeasuring electric variables2%

G06FElectric digital data processing1%

H03KPulse technique1%

H05KPrinted circuits1%

PatentTitleYear

10,879,253Semiconductor device and manufacturing method thereof2020 10,868,024Method of forming embedded nonvolatile memory2020 10,868,026Method to improve fill-in window for embedded memory2020 10,868,108Semiconductor device having high voltage lateral capacitor and manufacturing method thereof2020 10,867,900Dummy metal with zigzagged edges2020 10,868,027Structure and method for preventing silicide contamination during the manufacture of micro-processors with embedded flash memory2020 10,861,951Transistor layout to reduce kink effect2020 10,847,530Nitride-free spacer or oxide spacer for embedded flash memory2020 10,833,030Semiconductor device and method of manufacture2020 10,811,426NVM memory HKMG integration technology2020 10,811,504Semiconductor structure for flash memory cells and method of making same2020 10,811,394Devices employing thermal and mechanical enhanced layers and methods of forming same2020 10,796,947Method of manufacturing a semiconductor device2020 10,783,954Semiconductor memory with respective power voltages for memory cells2020 10,784,207Multi-stacked package-on-package structures2020 10,784,270Method to improve fill-in window for embedded memory2020 D0896027Baking plate2020 10,748,895Semiconductor arrangement and formation thereof2020 10,741,555Metal gate modulation to improve kink effect2020 10,741,569Semiconductor device and manufacturing method thereof2020 10,734,295Interposer test structures and methods2020 10,714,426Semiconductor package and method of forming the same2020 10,700,045Surface mount device/integrated passive device on package or device structure and methods of forming2020 10,692,750Method for fabricating a semiconductor device2020 10,685,704Static random access memory circuit2020 10,672,778Semiconductor device and manufacturing method thereof2020 10,672,776Memory circuit having resistive device coupled with supply voltage line2020 10,663,512Testing of semiconductor chips with microbumps2020 10,665,600Memory devices and method of fabricating same2020 10,665,595Metal isolation testing in the context of memory cells2020 10,658,373Method for manufacturing semiconductor device with metal gate memory device and metal gate logic device2020 10,650,882Static random access memory with a supplementary driver circuit and method of controlling the same2020 10,644,013Cell boundary structure for embedded memory2020 10,629,537Conductive vias in semiconductor packages and methods of forming same2020 10,553,580Method of manufacturing semiconductor device2020 10,535,675High voltage CMOS with co-planar upper gate surfaces for embedded non-volatile memory2020 10,515,977Boundary design to reduce memory array edge CMP dishing effect2019 10,516,026Split gate memory device and method of fabricating the same2019 10,515,829Package system for integrated circuits2019 10,510,654Dummy metal with zigzagged edges2019 10,510,674Fan-out package having a main die and a dummy die, and method of forming2019 10,510,855Transistor layout to reduce kink effect2019 10,510,763Embedded nonvolatile memory and forming method thereof2019 10,504,877Surface mount device/integrated passive device on package or device structure and methods of forming2019 D0868857Torch2019 10,490,460Semiconductor arrangement and method of forming2019 10,475,805Nitride-free spacer or oxide spacer for embedded flash memory2019 10,475,768Redistribution layers in semiconductor packages and methods of forming same2019 RE047709Forming grounded through-silicon vias in a semiconductor substrate2019 10,468,410Metal gate modulation to improve kink effect2019 10,461,036Multi-stacked package-on-package structures2019 10,453,813Contact pad for semiconductor device2019 10,453,932Semiconductor structure for flash memory cells and method of making same2019 D0863910Hand-held tool2019 10,418,361Circuit incorporating multiple gate stack compositions2019 D0859109Soldering bit2019 10,381,358Semiconductor device and manufacturing method thereof2019 10,373,964Method of writing to memory circuit using resistive device2019 10,354,961Routing design of dummy metal cap and redistribution line2019 10,347,606Devices employing thermal and mechanical enhanced layers and methods of forming same2019 10,347,649Nitride-free spacer or oxide spacer for embedded flash memory2019 10,332,882Semiconductor device having protective structure over shallow trench isolation region and fabricating method thereof2019 10,325,918Semiconductor device and manufacturing method thereof2019 10,325,919Mask design for embedded memory2019 10,319,681Dummy features in redistribution layers (RDLS) and methods of forming same2019 10,319,683Multi-stacked package-on-package structures2019 10,290,584Conductive vias in semiconductor packages and methods of forming same2019 10,283,512Semiconductor device and manufacturing method thereof2019 10,276,588HKMG high voltage CMOS for embedded non-volatile memory2019 10,276,587NVM memory HKMG integration technology2019 10,269,738Semiconductor device and method of manufacture2019 10,175,294Testing of semiconductor chips with microbumps2019 10,176,864Static random access memory circuits2019 10,163,522Test line letter for embedded non-volatile memory technology2018 10,164,074Semiconductor device with gate electrode embedded in substrate2018 10,163,497Three dimensional dual-port bit cell and method of using same2018 10,163,805Package structure and method for forming the same2018 10,163,802Fan-out package having a main die and a dummy die, and method of forming2018 10,163,919Embedded flash memory device with floating gate embedded in a substrate2018 10,165,682Opening in the pad for bonding integrated passive device in InFO package2018 10,157,852Multi-stacked package-on-package structures2018 10,157,825Dummy metal with zigzagged edges2018 10,147,794Split gate memory device and method of fabricating the same2018 10,141,288Surface mount device/integrated passive device on package or device structure and methods of forming2018 10,134,743Structure and method for statice random access memory device of vertical tunneling field effect transistor2018 10,090,213Interposer test structures and methods2018 10,068,773Contact formation for split gate flash memory2018 10,062,648Semiconductor package and method of forming the same2018 10,062,419Digtial circuit structures2018 10,056,347Bump structure for yield improvement2018 10,049,898Semiconductor device packages, packaging methods, and packaged semiconductor devices2018 10,050,050Semiconductor device with metal gate memory device and metal gate logic device and method for manufacturing the same2018 10,032,786Semiconductor device and manufacturing method thereof2018 10,026,741Logic-compatible memory cell manufacturing method and structure thereof2018 9,997,464Dummy features in redistribution layers (RDLS) and methods of forming same2018 9,997,235Semiconductor memory with respective power voltages for plurality of memory cells2018 9,988,264Method of fabricating integrated structure for MEMS device and semiconductor device2018 9,983,257Test line patterns in split-gate flash technology2018 9,984,981Packages with interposers and methods for forming the same2018 9,984,998Devices employing thermal and mechanical enhanced layers and methods of forming same2018 9,978,759Memory devices and method of forming same2018 9,972,524Method for fabricating a semiconductor device2018 9,972,581Routing design of dummy metal cap and redistribution line2018 9,960,176Nitride-free spacer or oxide spacer for embedded flash memory2018 9,947,676NVM memory HKMG integration technology2018 9,941,685Leakage protection method and device having live/neutral wire identification function2018 9,929,112'Semiconductor device and method of manufacture'2018 9,928,980'Method of electricity leakage detection and prevention of electrical equipment\'s outer surface and system thereof'2018 9,929,168'Embedded memory and methods of forming the same'2018 9,911,805'Silicon recess etch and epitaxial deposit for shallow trench isolation (STI)'2018 9,905,292'Three dimensional dual-port bit cell and method of using same'2018 9,878,510'Pressing apparatus and stamp press apparatus'2018 9,874,732Zoom lens and image device using the same2018 9,876,021Embedded HKMG non-volatile memory2018 9,865,605'Memory circuit having resistive device coupled with supply voltage line'2018 9,865,610'Si recess method in HKMG replacement gate technology'2018 9,852,957Testing, manufacturing, and packaging methods for semiconductor devices2017 9,842,848'Embedded HKMG non-volatile memory'2017 9,842,850'High-K-last manufacturing process for embedded memory with silicon-oxide-nitride-oxide-silicon (SONOS) memory cells'2017 9,837,322Semiconductor arrangement and method of forming2017 9,837,130Digtial circuit structures to control leakage current2017 9,831,262Embedded HKMG non-volatile memory2017 9,812,426'Integrated fan-out package, semiconductor device, and method of fabricating the same'2017 9,812,460'NVM memory HKMG integration technology'2017 9,799,394'Static random access memory (SRAM) with recovery circuit for a write operation'2017 9,793,286'Embedded HKMG non-volatile memory'2017 9,786,567'Chip-on-wafer process control monitoring for chip-on-wafer-on-substrate packages'2017 9,760,509'Memory storage device and control method thereof and memory control circuit unit and module'2017 9,760,670'Semiconductor device design methods and conductive bump pattern enhancement methods'2017 9,754,831'Dummy structure for chip-on-wafer-on-substrate'2017 9,754,955'High-K-last manufacturing process for embedded memory with metal-oxide-nitride-oxide-silicon (MONOS) memory cells'2017 9,741,690'Redistribution layers in semiconductor packages and methods of forming same'2017 9,735,245'Recessed salicide structure to integrate a flash memory device with a high Îº, metal gate logic device'2017 9,721,947'Semiconductor device and method of manufacturing'2017 9,711,415'Device for high-K and metal gate stacks'2017 9,704,565'Method of using a static random access memory'2017 9,691,840'Cylindrical embedded capacitors'2017 9,691,686'Contact pad for semiconductor device'2017 9,685,223'Voltage controller'2017 9,679,979'Semiconductor structure for flash memory cells and method of making same'2017 9,673,194'Semiconductor arrangement and formation thereof'2017 9,673,205'Embedded nonvolatile memory and forming method thereof'2017 9,659,953'HKMG high voltage CMOS for embedded non-volatile memory'2017 9,659,620'Memory device with self-boosted mechanism'2017 9,633,869'Packages with interposers and methods for forming the same'2017 9,620,372'HK embodied flash memory and methods of forming the same'2017 9,618,572'Testing of semiconductor chips with microbumps'2017 9,613,174'Common template for electronic article'2017 9,589,857'Interposer test structures and methods'2017 9,583,591'Si recess method in HKMG replacement gate technology'2017 9,581,638'Chip-on-wafer process control monitoring for chip-on-wafer-on-substrate packages'2017 9,576,645'Three dimensional dual-port bit cell and method of using same'2017 9,576,855'Device and methods for high-k and metal gate stacks'2017 9,570,324'Method of manufacturing package system'2017 9,570,366'Passivation layer for packaged chip'2017 9,558,966'Semiconductor device packages, packaging methods, and packaged semiconductor devices'2017 9,559,177'Memory devices and method of fabricating same'2017 9,553,053'Bump structure for yield improvement'2017 9,543,153'Recess technique to embed flash memory in SOI technology'2017 9,536,598'Memory arrangement'2017 9,502,514'Memory devices and method of forming same'2016 9,502,533'Silicon recess etch and epitaxial deposit for shallow trench isolation (STI)'2016 9,502,343'Dummy metal with zigzagged edges'2016 9,496,276'CMP fabrication solution for split gate memory embedded in HK-MG process'2016 9,484,351'Split gate memory device and method of fabricating the same'2016 9,472,636'Cost-effective gate replacement process'2016 9,462,692'Test structure and method of testing electrical characteristics of through vias'2016 9,431,413'STI recess method to embed NVM memory in HKMG replacement gate technology'2016 9,425,126'Dummy structure for chip-on-wafer-on-substrate'2016 9,425,206'Boundary scheme for embedded poly-SiON CMOS or NVM in HKMG CMOS technology'2016 9,397,112'L-shaped capacitor in thin film storage technology'2016 9,392,266'Three-dimensional display device'2016 9,390,927'Contact formation for split gate flash memory'2016 9,378,961'Methods of fabricating multiple gate stack compositions'2016 9,372,951'Semiconductor device design methods and conductive bump pattern enhancement methods'2016 9,372,206'Testing of semiconductor chips with microbumps'2016 9,349,742'Embedded memory and methods of forming the same'2016 9,287,279'Silicon nitride (SiN) encapsulating layer for silicon nanocrystal memory storage'2016 9,281,056'Static random access memory and method of using the same'2016 9,276,010'Dual silicide formation method to embed split gate flash memory in high-k metal gate (HKMG) technology'2016 9,230,977'Embedded flash memory device with floating gate embedded in a substrate'2016 9,202,817'Semiconductor device and method for manufacturing the same'2015 9,184,252'Flash memory embedded with HKMG technology'2015 9,171,849'Three dimensional dual-port bit cell and method of using same'2015 9,165,623'Memory arrangement'2015 9,159,842'Embedded nonvolatile memory'2015 9,142,414'CMOS devices with metal gates and methods for forming the same'2015 9,136,393'HK embodied flash memory and methods of forming the same'2015 9,128,506'Power tracking device and power tracking method'2015 9,129,823'Silicon recess ETCH and epitaxial deposit for shallow trench isolation (STI)'2015 9,128,123'Interposer test structures and methods'2015 9,116,203'Testing of semiconductor chips with microbumps'2015 9,093,176'Power line lowering for write assisted control scheme'2015 9,082,651'Memory devices and method of forming same'2015 9,082,630'Semiconductor device and fabricating method thereof'2015 9,076,672'Cost-effective gate replacement process'2015 9,048,233'Package systems having interposers'2015 9,048,335'Method of fabricating multiple gate stack compositions'2015 9,013,908'Control scheme for 3D memory IC'2015 9,003,338'Common template for electronic article'2015 9,000,533'Device and methods for high-K and metal gate stacks'2015 8,993,432'Test structure and method of testing electrical characteristics of through vias'2015 8,969,949'Structure and method for static random access memory device of vertical tunneling field effect transistor'2015 8,947,953'Bit cell internal voltage control'2015 8,896,089'Interposers for semiconductor devices and methods of manufacture thereof'2014 8,878,182'Probe pad design for 3DIC package yield analysis'2014 8,872,287'Integrated structure for MEMS device and semiconductor device and method of fabricating the same'2014 8,872,345'Forming grounded through-silicon vias in a semiconductor substrate'2014 8,853,753'Contact for high-k metal gate device'2014 8,846,510'Method and structure to boost MOSFET performance and NBTI'2014 8,829,887'Pulse type layer-ID detector for 3D-IC and method of the same'2014 8,797,057'Testing of semiconductor chips with microbumps'2014 8,761,956'Computer and control method for smart fan thereof'2014 8,753,931'Cost-effective gate replacement process'2014 8,753,971'Dummy metal design for packaging structures'2014 8,693,163'Cylindrical embedded capacitors'2014 8,564,305'Discontinuous type layer-ID detector for 3D-IC and method of the same'2013 8,558,229'Passivation layer for packaged chip'2013 8,546,227'Contact for high-K metal gate device'2013 8,466,651'Multifunctional computer rechargeable battery application system and application method thereof'2013 8,329,521'Method and device with gate structure formed over the recessed top portion of the isolation structure'2012 8,283,781'Semiconductor device having pad structure with stress buffer layer'2012 8,258,606'High frequency flip chip package structure of polymer substrate'2012 8,193,639'Dummy metal design for packaging structures'2012 8,169,276'Vertical transmission line structure that includes bump elements for flip-chip mounting'2012 8,033,039'High frequency flip chip package process of polymer substrate and structure thereof'2011 7,969,193'Differential sensing and TSV timing control scheme for 3D-IC'2011 7,940,143'Vertical transmission line structure that includes bump elements for flip-chip mounting'2011 7,898,081'MEMS device and method of making the same'2011 7,724,726'Data transmission system for dynamically adjusting PDU length, method thereof, and computer-readable recording medium'2010

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2011–2020Based in Hsinchu, TW· patent location history

2011–2020Based in Hsinchu County, TW· patent location history

2012–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (36)· patent assignee history

2012–2017Patents assigned to WU WEI-CHENG (22)· patent assignee history

2012–2017Patents assigned to HOU SHANG-YUN (13)· patent assignee history

2012–2017Patents assigned to JENG SHIN-PUU (12)· patent assignee history

2012–2020Based in Zhubei City, TW· patent location history

2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (169)· patent assignee history

2016–2020Based in Taichung, TW· patent location history

2018Based in Wenzhou, CN· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
TAIWAN SEMICONDUCTOR MFG CO LTD	169	2015–2020
TAIWAN SEMICONDUCTOR MFG	36	2012–2016
WU WEI-CHENGself	22	2012–2017
HOU SHANG-YUN	13	2012–2017
JENG SHIN-PUU	12	2012–2017

Locations

Location	Patents	Span
Hsinchu, TW	107	2011–2020
Zhubei City, TW	93	2012–2020
Hsinchu County, TW	16	2011–2020
Taichung, TW	5	2016–2020
Wenzhou, CN	2	2018