Inventor
Hidenobu Fukutome
Inventor
Kawasaki, JP
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices37%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1023%
H01LSemiconductor devices21%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
G11CStatic stores4%
H04MTelephonic communication4%
H04WWireless communication networks4%
PatentTitleYear
10,332,878Semiconductor device with impurity-doped region and method of fabricating the same20199,842,909'Semiconductor device and fabricating method thereof'20179,825,171'Semiconductor device, method of manufacturing the same, and method of evaluating semiconductor device'20179,786,565'Semiconductor device and method of manufacturing the semiconductor device'20179,559,101'Semiconductor device with impurity-doped region and method of fabricating the same'20179,437,737'Semiconductor device, method of manufacturing the same, and method of evaluating semiconductor device'20169,276,116'Semiconductor device and fabricating method thereof'20169,240,481'Semiconductor device having embedded strain-inducing pattern'20169,093,529'Semiconductor device, method of manufacturing the same, and method of evaluating semiconductor device'20158,962,435'Method of forming semiconductor device having embedded strain-inducing pattern'20158,884,298'Semiconductor device having embedded strain-inducing pattern and method of forming the same'20148,546,247'Manufacturing method of semiconductor device with amorphous silicon layer formation'20138,399,345'Semiconductor device having nickel silicide layer'20138,362,530'Semiconductor device including MISFET and its manufacture method'20137,989,299'Semiconductor device, method of manufacturing the same, and method of evaluating semiconductor device'20117,977,194'Method for fabricating semiconductor device with fully silicided gate electrode'20117,898,036'Semiconductor device and process for manufacturing the same'20117,592,243'Method of suppressing diffusion in a semiconductor device'20096,977,417'Semiconductor device and method of fabricating the same'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005–2017Based in Kawasaki, JP· patent location history
2011–2017Patents assigned to FUJITSU SEMICONDUCTOR LTD (10)· patent assignee history
2013–2017Patents assigned to FUKUTOME HIDENOBU (9)· patent assignee history
2013Based in Kyoto, JP· patent location history
2014–2019Patents assigned to SAMSUNG ELECTRONICS CO LTD (7)· patent assignee history
2014–2017Patents assigned to MAEDA SHIGENOBU (4)· patent assignee history
2014–2016Patents assigned to JEONG JOO-HYUN (3)· patent assignee history
2014–2019Based in Seongnam-si, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| FUJITSU SEMICONDUCTOR LTD | 10 | 2011–2017 |
| FUKUTOME HIDENOBUself | 9 | 2013–2017 |
| SAMSUNG ELECTRONICS CO LTD | 7 | 2014–2019 |
| MAEDA SHIGENOBU | 4 | 2014–2017 |
| JEONG JOO-HYUN | 3 | 2014–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kawasaki, JP | 10 | 2005–2017 |
| Seongnam-si, KR | 7 | 2014–2019 |
| Kyoto, JP | 2 | 2013 |