Inventor
Yue Ke
Inventor
Fishkill, NY, US
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices35%
H10DInorganic electric semiconductor devices35%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1019%
B82YSpecific uses or applications of nanostructures2%
C30BSingle-crystal growth2%
G01RMeasuring electric variables2%
G01SRadio direction-finding2%
G01VGeophysics2%
H01RElectrically-conductive connections2%
PatentTitleYear
10,615,279FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth202010,243,077FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth20199,917,190'FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth'20189,875,939Methods of forming uniform and pitch independent fin recess20189,752,251'Self-limiting selective epitaxy process for preventing merger of semiconductor fins'20179,685,334'Methods of forming semiconductor fin with carbon dopant for diffusion control'20179,634,084'Conformal buffer layer in source and drain regions of fin-type transistors'20179,577,100'FinFET and nanowire semiconductor devices with suspended channel regions and gate structures surrounding the suspended channel regions'20179,577,099'Diamond shaped source drain epitaxy with underlying buffer layer'20179,536,985'Epitaxial growth of material on source/drain regions of FinFET structure'20179,466,616'Uniform junction formation in FinFETs'20169,349,650'Low resistance and defect free epitaxial semiconductor material for providing merged FinFETs'20169,349,649'Low resistance and defect free epitaxial semiconductor material for providing merged FinFETs'20169,318,608'Uniform junction formation in FinFETs'20169,312,364'finFET with dielectric isolation after gate module for improved source and drain region epitaxial growth'20169,287,264'Epitaxially grown silicon germanium channel FinFET with silicon underlayer'20169,246,003'FINFET structures with fins recessed beneath the gate'20169,123,826'Single crystal source-drain merged by polycrystalline material'20159,075,135'Reporting connection failure'2015Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2015–2020Patents assigned to IBM (8)· patent assignee history
2015Patents assigned to LENOVO ENTPR SOLUTIONS SINGAPORE PTE LTD (1)· patent assignee history
2015–2020Based in Fishkill, NY, US· patent location history
2015Based in Shanghai, CN· patent location history
2016–2018Patents assigned to GLOBALFOUNDRIES INC (12)· patent assignee history
2016Based in Hopewell Junction, NY, US· patent location history
2017–2018Based in Arlington, MA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| GLOBALFOUNDRIES INC | 12 | 2016–2018 |
| IBM | 8 | 2015–2020 |
| LENOVO ENTPR SOLUTIONS SINGAPORE PTE LTD | 1 | 2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Fishkill, New York, US | 15 | 2015–2020 |
| Arlington, Massachusetts, US | 2 | 2017–2018 |
| Hopewell Junction, New York, US | 1 | 2016 |
| Shanghai, CN | 1 | 2015 |