Inventor
William D. Cox
Inventor
Chapel Hill, NC, US
Overview
Patents· 24 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique46%
H10DInorganic electric semiconductor devices15%
G06FElectric digital data processing13%
G11CStatic stores10%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
H01GCapacitors5%
G01RMeasuring electric variables3%
PatentTitleYear
7,972,907'Via configurable architecture for customization of analog circuitry in a semiconductor device'20117,930,670'Using selectable in-line inverters to reduce the number of inverters in a semiconductor design'20117,692,309'Configuring structured ASIC fabric using two non-adjacent via layers'20107,626,272'Via configurable architecture for customization of analog circuitry in a semiconductor device'20097,595,229'Configurable integrated circuit capacitor array using via mask layers'20097,538,580'Logic array devices having complex macro-cell architecture and methods facilitating use of same'20097,449,371'VIA configurable architecture for customization of analog circuitry in a semiconductor device'20087,378,874'Creating high-drive logic devices from standard gates with minimal use of custom masks'20087,335,966'Configurable integrated circuit capacitor array using via mask layers'20087,334,208'Customization of structured ASIC devices using pre-process extraction of routing information'20087,248,071'Logic array devices having complex macro-cell architecture and methods facilitating use of same'20076,873,185'Logic array devices having complex macro-cell architecture and methods facilitating use of same'20056,693,454'Distributed RAM in a logic array'20046,580,289'Cell architecture to reduce customization in a semiconductor device'20035,900,742'Interface cell for a programmable integrated circuit employing antifuses'19995,729,468'Reducing propagation delays in a programmable device'19985,682,106'Logic module for field programmable gate array'19975,675,502'Estimating propagation delays in a programmable device'19975,552,720'Method for simultaneous programming of multiple antifuses'19965,544,070'Programmed programmable device and method for programming antifuses of a programmable device'19965,526,276'Select set-based technology mapping method and apparatus'19965,469,077'Field programmable antifuse device and programming method therefor'19955,416,367'Programmable application specific integrated circuit and logic cell therefor'19955,327,024'Field programmable antifuse device and programming method therefor'1994Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1994–1999Patents assigned to QUICKLOGIC CORP (10)· patent assignee history
1994–1996Based in Milpitas, CA, US· patent location history
1996–1999Based in San Jose, CA, US· patent location history
2003–2011Patents assigned to VIASIC INC (14)· patent assignee history
2003–2011Based in Chapel Hill, NC, US· patent location history
2008–2011Patents assigned to TRIAD SEMICONDUCTOR INC (4)· patent assignee history
2008Patents assigned to TRIAD SEMICONDUCTOR (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| VIASIC INC | 14 | 2003–2011 |
| QUICKLOGIC CORP | 10 | 1994–1999 |
| TRIAD SEMICONDUCTOR INC | 4 | 2008–2011 |
| TRIAD SEMICONDUCTOR | 1 | 2008 |
Locations
| Location | Patents | Span |
|---|---|---|
| Chapel Hill, NC, US | 14 | 2003–2011 |
| San Jose, California, US | 5 | 1996–1999 |
| Milpitas, California, US | 5 | 1994–1996 |