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Inventor

Yonghua Song

Inventor
Cupertino, CA, US

Overview

60→
Patents
2002–2017
Patent span
Electricity
Primary field (CPC H)

Patents· 60 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H03Fprimary
H03FAmplifiers17%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses11%
H04BTransmission11%
H04LTransmission of digital information, e.g. telegraphic communication11%
H03KPulse technique10%
H03GControl of amplification7%
H04WWireless communication networks6%
G05FSystems for regulating electric or magnetic variables5%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use4%
G11BInformation storage based on relative movement between record carrier and transducer3%
PatentTitleYear
9,846,499Touch panel and touch detection circuit20179,841,855'Systems and methods for capacitive touch detection'20179,490,810'Low-noise, temperature-insensitive, voltage or current input, analog front end architecture'20169,220,136'Method and apparatus for controlling a lighting device'20159,190,859'Voltage reference buffer using voltage battery level shifter'20159,190,973'Headphone amplifier'20159,184,839'Method and apparatus for compensating impairments in radio frequency circuitry of a wireless device'20159,148,188'System and method for tuning a receiver by iteratively dividing a frequency band into multiple sub-bands'20158,989,684'Voltage regulator for providing a regulated voltage to subcircuits of an RF frequency circuit'20158,907,833'Low power high speed pipeline ADC'20148,823,441'Low power, low voltage phase interpolator'20148,781,539'Method and apparatus for reducing wake up time of a powered down device'20148,760,220'Beta enhanced voltage reference circuit'20148,698,537'Method and apparatus for reducing jitter in a transmitter'20148,639,201'Voltage regulator for high performance RF systems'20148,633,757'Low-noise, temperature-insensitive, voltage or current input, analog front end architecture'20148,598,948'Self biased low noise high PSRR constant gm for VCO'20138,593,920'Calibration based DC coupled analog front end for optical storage system'20138,571,142'System and method for non-crystal-based communications'20138,536,927'Low power, low voltage phase interpolator'20138,477,895'Adaptive timing using clock recovery'20138,471,625'Beta enhanced voltage reference circuit'20138,451,160'Low power high speed pipeline ADC'20138,359,074'Method and apparatus for reducing wake up time of a powered down device'20138,354,887'Charge compensation for operational transconductance amplifier based circuits'20138,331,206'Calibration based DC coupled analog front end for optical storage system'20128,331,884'Voltage regulator for high performance RF systems'20128,319,547'Self biased low noise high PSRR constant GM for VCO'20128,294,503'Method and apparatus for reducing jitter in a transmitter'20128,265,201'Adaptive timing using clock recovery'20128,228,110'Low power, low voltage phase interpolator'20128,077,807'Adaptive timing using clock recovery'20117,990,225'Low-jitter phase-locked loop'20117,899,422'Sigma delta modulated phase lock loop with phase interpolation'20117,869,312'Calibration based DC coupled analog front end for optical storage system'20117,852,168'Power-efficient biasing circuit'20107,808,317'Baseband filter start-up circuit'20107,809,339'Voltage regulator for high performance RF systems'20107,791,406'Low leakage power management'20107,724,596'Auto-zero current sensing amplifier'20107,710,188'Low-noise, temperature-insensitive, voltage or current input, analog front end architecture'20107,667,533'Self biased low noise high PSRR constant GM for VCO'20107,664,204'Adaptive timing using clock recovery'20107,528,657'Baseband filter start-up circuit'20097,528,667'T-network capbank'20097,459,975'Baseband filter start-up circuit'20087,454,634'Power savings apparatus and method for wireless network devices'20087,259,600'Scalable integrated circuit architecture'20077,239,199'Amplifier calibration'20077,190,936'Voltage regulator for high performance RF systems'20077,190,199'Scalable integrated circuit architecture with analog circuits'20077,184,799'Method and apparatus for reducing wake up time of a powered down device'20077,181,180'Sigma delta modulated phase lock loop with phase interpolation'20077,180,369'Baseband filter start-up circuit'20077,173,489'Programmable gain voltage buffer'20077,167,018'Circuits, architectures, systems and methods for overvoltage protection'20077,119,590'Scalable integrated circuit architecture'20067,026,839'Circuits, architectures, systems and methods for overvoltage protection'20066,998,888'Scalable integrated circuit architecture with analog circuits'20066,359,499'Temperature and process independent CMOS circuit'2002

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2002–2016Patents assigned to MARVELL INT LTD (56)· patent assignee history
2002–2014Based in Saratoga, CA, US· patent location history
2008–2017Based in Cupertino, CA, US· patent location history
2010–2017Patents assigned to MARVELL WORLD TRADE LTD (5)· patent assignee history
2011–2015Patents assigned to SONG YONGHUA (17)· patent assignee history
2011–2013Patents assigned to WANG HUI (5)· patent assignee history
2013–2015Patents assigned to SHUI TAO (4)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MARVELL INT LTD562002–2016
SONG YONGHUAself172011–2015
MARVELL WORLD TRADE LTD52010–2017
WANG HUI52011–2013
SHUI TAO42013–2015
Locations
LocationPatentsSpan
Cupertino, California, US332008–2017
Saratoga, California, US272002–2014