Inventor

Thomas Kuenemund

Inventor
Munich, DE

Overview

50→
Patents
1994–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 50 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H03Kprimary
H03KPulse technique18%
G06FElectric digital data processing17%
H01LSemiconductor devices11%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1011%
G11CStatic stores10%
H10DInorganic electric semiconductor devices9%
H04LTransmission of digital information, e.g. telegraphic communication7%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation4%
G09CCiphering or deciphering apparatus for cryptographic or other purposes involving the need for secrecy3%
G01RMeasuring electric variables1%
PatentTitleYear
10,804,216Chip with circuit for detecting an attack on the chip202010,607,033Physical uncloneable function circuit202010,600,742Chip with circuit for detecting an attack on the chip202010,483,972Delay circuit201910,418,996Circuit and method for checking the integrity of a control signal201910,418,999Programmable logic circuit and method for implementing a boolean function201910,410,980Semiconductor chip201910,395,063Zero detection circuit and masked boolean or circuit201910,347,630Semiconductor chip using logic circuitry including complementary FETs for reverse engineering protection201910,276,222Method for accessing a memory and memory access circuit201910,249,219Chip and method for operating a processing circuit201910,199,334Digital circuit and method for manufacturing a digital circuit20199,806,881'Cryptographic processor, method for implementing a cryptographic processor and key generation circuit'20179,768,128'Chip and method for detecting an attack on a chip'20179,729,133'Electronic transmission element'20179,678,924'Method and data processing device for reconstructing a vector'20179,679,167'Chip and method for detecting an attack on a chip'20179,552,499'Circuit arrangement and method for safeguarding a circuit arrangement with respect to repeated light attacks'20179,548,737'Method for manufacturing a digital circuit and digital circuit'20179,496,872'Method for manufacturing a digital circuit and digital circuit'20169,449,172'Memory arrangement and method for detecting an attack on a memory arrangement'20169,431,353'Method for manufacturing a digital circuit and digital circuit'20169,432,014'Circuit arrangement for preventing high current flow during energy-saving mode'20169,431,398'Semiconductor chip having a circuit with cross-coupled transistors to thwart reverse engineering'20169,419,623'Semiconductor component and an operating method for a protective circuit against light attacks'20169,407,255'Circuit'20169,385,726'Chip and method for manufacturing a chip'20169,356,622'Apparatus and method for reconstructing a bit sequence with preliminary correction'20169,337,156'Method for manufacturing a digital circuit and digital circuit'20168,901,979'Storage circuit'20148,890,205'Semiconductor component and an operating method for a protective circuit against light attacks'20148,854,866'Identification circuit and method for generating an identification bit'20148,726,123'Bit error correction for removing age related errors in a bit pattern'20148,502,585'Device with a data retention mode and a data processing mode'20138,334,707'Storage circuit with fault detection and method for operating the same'20128,135,767'Standard cell for arithmetic logic unit and chip card controller'20128,130,008'Integrated circuit with a radiation-sensitive thyristor structure'20127,999,559'Digital fault detection circuit and method'20117,921,148'Standard cell for arithmetic logic unit and chip card controller'20117,916,517'Circuit arrangement and method for recognizing manipulation attempts'20117,898,836'Masked memory cells'20117,898,842'Memory for storing a binary state'20117,894,242'Device for storing a binary state'20117,830,170'Logic gate'20107,826,299'Method and apparatus for operating maskable memory cells'20107,707,237'Macrocell and method for adding'20107,477,552'Apparatus and method for reducing leakage currents of integrated circuits having at least one transistor'20097,468,930'Apparatus and method for reducing the leakage current of memory cells in the energy-saving mode'20087,161,869'Transmission device'20075,371,832'Fuzzy logic controller having high processing speed'1994

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1994–2020Based in Munich, DE· patent location history
2007–2020Patents assigned to INFINEON TECHNOLOGIES AG (48)· patent assignee history
2012–2014Patents assigned to KUENEMUND THOMAS (7)· patent assignee history
2013Patents assigned to DEPPE ROSWITHA (1)· patent assignee history
2014Patents assigned to D ARGOUGES MICHEL (1)· patent assignee history
2014Patents assigned to GAMMEL BERNDT (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INFINEON TECHNOLOGIES AG482007–2020
KUENEMUND THOMASself72012–2014
D ARGOUGES MICHEL12014
DEPPE ROSWITHA12013
GAMMEL BERNDT12014
Locations
LocationPatentsSpan
Munich, DE501994–2020