Inventor
Moon-han Park
Inventor
Yongin-si, KR
Overview
Patents· 33 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices30%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1029%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1021%
H01LSemiconductor devices10%
H10BElectronic memory devices6%
C09GPolishing compositions2%
C09KMaterials for miscellaneous applications, not provided for elsewhere2%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
PatentTitleYear
10,755,932Method of manufacturing integrated circuit device202010,658,249Methods for fabricating finFET devices having gate spacers on field insulating layers202010,224,204Method of manufacturing integrated circuit device20199,793,399'Semiconductor device having insulating pattern and method of forming the same'20178,877,579'Methods of manufacturing semiconductor devices'20148,815,673'Methods of forming MOSFET devices using nitrogen-injected oxide layers to form gate insulating layers having different thicknesses'20148,664,111'Method of patterning a semiconductor device with hard mask'20148,455,345'Methods of forming gate structure and methods of manufacturing semiconductor device including the same'20137,723,193'Method of forming an at least penta-sided-channel type of FinFET transistor'20107,439,596'Transistors for semiconductor device and methods of fabricating the same'20087,385,247'At least penta-sided-channel type of FinFET transistor'20087,368,792'MOS transistor with elevated source/drain structure'20087,294,546'Capacitor for a semiconductor device and method of fabricating same'20077,033,895'Method of fabricating a MOS transistor with elevated source/drain structure using a selective epitaxial growth process'20066,987,310'Multi-layered structure including an epitaxial layer having a low dislocation defect density, semiconductor device comprising the same, and method of fabricating the semiconductor device'20066,878,575'Method of forming gate oxide layer in semiconductor devices'20056,875,670'Trench isolation method'20056,835,621'Method of fabricating non-volatile memory device having a structure of silicon-oxide-nitride-oxide-silicon'20046,717,231'Trench isolation regions having recess-inhibiting layers therein that protect against overetching'20046,624,041'Method for forming trench type isolation film using annealing'20036,566,229'Method of forming an insulating layer in a trench isolation type semiconductor device'20036,537,914'Integrated circuit device isolation methods using high selectivity chemical-mechanical polishing'20036,482,715'Method of forming shallow trench isolation layer in semiconductor device'20026,465,866'Trench isolation regions having trench liners with recessed ends'20026,461,937'Methods of forming trench isolation regions having recess-inhibiting layers therein that protect against overetching'20026,331,469'Trench isolation structure, semiconductor device having the same, and trench isolation method'20016,083,808'Method for forming a trench isolation in a semiconductor device'20006,037,237'Trench isolation methods utilizing composite oxide films'20005,885,883'Methods of forming trench-based isolation regions with reduced susceptibility to edge defects'19995,866,435'Methods of fabricating profiled device isolation trenches in integrated circuits'19995,858,858'Annealing methods for forming isolation trenches'19995,728,620'Isolation method of semiconductor device'19985,674,782'Method for efficiently removing by-products produced in dry-etching'1997Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1997–2020Patents assigned to SAMSUNG ELECTRONICS CO LTD (33)· patent assignee history
1997–1998Based in Seoul, KR· patent location history
1999–2004Based in Kyungki-do, KR· patent location history
2002–2007Based in Yongin, KR· patent location history
2006–2020Based in Yongin-si, KR· patent location history
2008–2014Based in Gyeonggi-do, KR· patent location history
2013–2014Patents assigned to DO JIN-HO (4)· patent assignee history
2013–2014Patents assigned to PARK MOON-HAN (4)· patent assignee history
2013–2014Patents assigned to KIM WEON-HONG (3)· patent assignee history
2013–2014Patents assigned to LIM HA-JIN (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 33 | 1997–2020 |
| DO JIN-HO | 4 | 2013–2014 |
| PARK MOON-HANself | 4 | 2013–2014 |
| KIM WEON-HONG | 3 | 2013–2014 |
| LIM HA-JIN | 3 | 2013–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Yongin-si, KR | 10 | 2006–2020 |
| Kyungki-do, KR | 10 | 1999–2004 |
| Yongin, KR | 8 | 2002–2007 |
| Gyeonggi-do, KR | 3 | 2008–2014 |
| Seoul, KR | 2 | 1997–1998 |