Inventor
Scott M. Mansfield
Inventor
Hopewell Junction, NY, US
Overview
Patents· 41 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G03Fprimary
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices48%
G06FElectric digital data processing8%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h107%
H01LSemiconductor devices6%
Y02PClimate change mitigation technologies in the production or processing of goods6%
B82YSpecific uses or applications of nanostructures4%
G02BOptical elements, systems or apparatus4%
G01QScanning-probe techniques or apparatus3%
H10DInorganic electric semiconductor devices3%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
PatentTitleYear
10,516,767Unifying realtime and static data for presenting over a web service20199,910,348'Method of simultaneous lithography and etch correction flow'20189,471,743'Predicting process fail limits'20169,252,022'Patterning assist feature to mitigate reactive ion etch microloading effect'20169,087,739'Pattern improvement in multiprocess patterning'20159,034,562'Pattern improvement in multiprocess patterning'20158,392,871'Decomposition with multiple exposures in a process window based OPC flow using tolerance bands'20138,365,108'Generating cut mask for double-patterning process'20138,214,770'Multilayer OPC for design aware manufacturing'20128,174,681'Calibration of lithographic process models'20128,166,423'Photomask design verification'20128,161,422'Fast and accurate method to simulate intermediate range flare effects'20128,108,804'Short path customized mask correction'20128,039,203'Integrated circuits and methods of design and manufacture thereof'20117,945,869'Mask and method for patterning a semiconductor wafer'20117,895,547'Test pattern based process model calibration'20117,765,021'Method to check model accuracy during wafer patterning simulation'20107,650,587'Local coloring for hierarchical OPC'20107,642,020'Method for separating optical and resist effects in process models'20107,607,114'Designer\'s intent tolerance bands for proximity correction and checking'20097,565,633'Verifying mask layout printability using simulation with adjustable accuracy'20097,503,028'Multilayer OPC for design aware manufacturing'20097,350,183'Method for improving optical proximity correction'20087,343,582'Optical proximity correction using progressively smoothed mask shapes'20087,266,798'Designer\'s intent tolerance bands for proximity correction and checking'20077,261,981'System and method of smoothing mask shapes for improved placement of sub-resolution assist features'20077,029,830'Precision and apertures for lithographic systems'20066,602,728'Method for generating a proximity model based on proximity rules'20036,553,559'Method to determine optical proximity correction and assist feature rules which account for variations in mask dimensions'20036,541,166'Method and apparatus for lithographically printing tightly nested and isolated device features using multiple mask exposures'20036,526,164'Intelligent photomask disposition'20036,421,820'Semiconductor device fabrication using a photomask with assist features'20026,413,683'Method for incorporating sub resolution assist features in a photomask layout'20026,346,979'Process and apparatus to adjust exposure dose in lithography systems'20025,965,306'Method of determining the printability of photomask defects'19995,932,377'Exact transmission balanced alternating phase-shifting mask for photolithography'19995,768,017'Optical system for producing uniform line illumination'19985,757,842'Method and apparatus for compensating thermal lensing effects in a laser cavity'19985,125,750'Optical recording system employing a solid immersion lens'19925,121,256'Lithography system employing a solid immersion lens'19925,004,307'Near field and solid immersion optical microscope'1991Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1991–1992Based in San Mateo, CA, US· patent location history
1998–2016Patents assigned to IBM (35)· patent assignee history
1998–2018Based in Hopewell Junction, NY, US· patent location history
2002–2011Patents assigned to INFINEON TECHNOLOGIES AG (3)· patent assignee history
2012–2015Patents assigned to MANSFIELD SCOTT M (8)· patent assignee history
2012–2015Patents assigned to GRAUR IOANA (4)· patent assignee history
2013Based in Hopewell Jct., NY, US· patent location history
2016–2019Patents assigned to GLOBALFOUNDRIES INC (4)· patent assignee history
2016–2019Based in Vestal, NY, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 35 | 1998–2016 |
| MANSFIELD SCOTT Mself | 8 | 2012–2015 |
| GLOBALFOUNDRIES INC | 4 | 2016–2019 |
| GRAUR IOANA | 4 | 2012–2015 |
| INFINEON TECHNOLOGIES AG | 3 | 2002–2011 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hopewell Junction, New York, US | 35 | 1998–2018 |
| San Mateo, California, US | 3 | 1991–1992 |
| Vestal, New York, US | 2 | 2016–2019 |
| Hopewell Jct., New York, US | 1 | 2013 |