Inventor
Li-Shyue Lai
Inventor
Jhubei City, TW
Overview
Patents· 25 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices26%
G11CStatic stores17%
H10NElectric solid-state devices not otherwise provided for17%
B82YSpecific uses or applications of nanostructures9%
H01LSemiconductor devices9%
H01JElectric discharge tubes or discharge lamps6%
H10BElectronic memory devices6%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h106%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%
PatentTitleYear
10,861,958Integrated circuits with gate stacks202010,283,623Integrated circuits with gate stacks20199,461,041'Metal gate finFET device'20168,921,218'Metal gate finFET device and method of fabricating thereof'20148,466,505'Multi-level flash memory cell capable of fast programming'20138,455,321'Multiple-gate transistors with reverse T-shaped fins'20138,264,021'Finfets and methods for forming the same'20128,263,959'Phase change memory device and method of manufacture thereof'20128,153,471'Method for forming a reduced active area in a phase change memory structure'20128,058,692'Multiple-gate transistors with reverse T-shaped fins'20118,022,382'Phase change memory devices with reduced programming current'20117,858,980'Reduced active area in a phase change memory structure'20107,436,698'MRAM arrays and methods for writing and reading magnetic memory devices'20087,265,373'Phase change memory device and method of manufacturing'20077,229,883'Phase change memory device and method of manufacture thereof'20077,203,129'Segmented MRAM memory array'20077,170,775'MRAM cell with reduced write current'20077,154,798'MRAM arrays and methods for writing and reading magnetic memory devices'20067,151,271'System and method for passing high energy particles through a mask'20067,105,879'Write line design in MRAM'20067,099,176'Non-orthogonal write line structure in MRAM'20067,071,478'System and method for passing particles on selected areas on a wafer'20067,050,290'Integrated capacitor'20067,035,083'Interdigitated capacitor and method for fabrication thereof'20066,873,535'Multiple width and/or thickness write line in MRAM'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005–2014Patents assigned to TAIWAN SEMICONDUCTOR MFG (22)· patent assignee history
2005–2014Based in Jhubei City, TW· patent location history
2006–2020Based in Hsinchu County, TW· patent location history
2007–2016Based in Hsinchu, TW· patent location history
2011–2014Patents assigned to LAI LI-SHYUE (7)· patent assignee history
2011–2013Patents assigned to LIN JING-CHENG (2)· patent assignee history
2012Patents assigned to LIN WEN-CHIN (2)· patent assignee history
2012Based in Jube, TW· patent location history
2016–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG | 22 | 2005–2014 |
| LAI LI-SHYUEself | 7 | 2011–2014 |
| TAIWAN SEMICONDUCTOR MFG CO LTD | 3 | 2016–2020 |
| LIN JING-CHENG | 2 | 2011–2013 |
| LIN WEN-CHIN | 2 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Jhubei City, TW | 18 | 2005–2014 |
| Hsinchu County, TW | 3 | 2006–2020 |
| Hsinchu, TW | 3 | 2007–2016 |
| Jube, TW | 1 | 2012 |