Inventor
James C. Parker
Inventor
Zionsville, PA, US
Overview
Patents· 20 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing43%
G01RMeasuring electric variables16%
H03KPulse technique16%
A61MDevices for introducing media into, or onto, the body3%
B65BMachines, apparatus or devices for, or methods of, packaging articles or materials3%
B65DContainers for storage or transport of articles or materials, e.g. bags, barrels, bottles, boxes, cans, cartons, crates, drums, jars, tanks, hoppers, forwarding containers3%
B65GTransport or storage devices, e.g. conveyors for loading or tipping, shop conveyor systems or pneumatic tube conveyors3%
G05FSystems for regulating electric or magnetic variables3%
G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes3%
G07FCoin-freed or like apparatus3%
PatentTitleYear
9,771,212'Method and apparatus for dispensing dry particulate consumables'20178,806,408'Methods for designing integrated circuits employing voltage scaling and integrated circuits designed thereby'20148,713,506'System and method for employing signoff-quality timing analysis information concurrently in multiple scenarios to reduce dynamic power in an electronic circuit and an apparatus incorporating the same'20148,689,161'Methods for designing integrated circuits employing pre-determined timing-realizable clock-insertion delays and integrated circuit design tools'20148,683,407'Hierarchical design flow generator'20148,543,951'Modeling approach for timing closure in hierarchical designs leveraging the separation of horizontal and vertical aspects of the design flow'20138,539,423'Systematic benchmarking system and method for standardized data creation, analysis and comparison of semiconductor technology node characteristics'20138,539,419'Method for designing integrated circuits employing a partitioned hierarchical design flow and an apparatus employing the method'20138,341,573'Modeling approach for timing closure in hierarchical designs leveraging the separation of horizontal and vertical aspects of the design flow'20128,307,324'Systematic benchmarking system and method for standardized data creation, analysis and comparison of semiconductor technology node characteristics'20128,281,266'Systematic, normalized metric for analyzing and comparing optimization techniques for integrated circuits employing voltage scaling and integrated circuits designed thereby'20128,239,805'Method for designing integrated circuits employing a partitioned hierarchical design flow and an apparatus employing the method'20128,127,264'Methods for designing integrated circuits employing context-sensitive and progressive rules and an apparatus employing one of the methods'20128,122,422'Establishing benchmarks for analyzing benefits associated with voltage scaling, analyzing the benefits and an apparatus therefor'20128,024,694'Systematic benchmarking system and method for standardized data creation, analysis and comparison of semiconductor technology node characteristics'20117,930,674'Modifying integrated circuit designs to achieve multiple operating frequency targets'20117,712,066'Area-efficient power switching cell'20106,754,616'Method of emulating an ideal transformer valid from DC to infinite frequency'20045,706,830'Liquid ventilator system and use thereof'19985,701,071'Systems for controlling power consumption in integrated circuits'1997Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1997–2004Based in Pleasanton, CA, US· patent location history
2010–2014Patents assigned to AGERE SYSTEMS INC (4)· patent assignee history
2010Based in Upper Milford Township, Lehigh County, PA, US· patent location history
2011–2014Based in Zionsville, PA, US· patent location history
2012–2014Patents assigned to PARKER JAMES C (10)· patent assignee history
2012–2014Patents assigned to LSI CORP (9)· patent assignee history
2012–2014Patents assigned to RAO VISHWAS M (9)· patent assignee history
2012–2013Patents assigned to AGERE SYSTEMS LLC (3)· patent assignee history
2013–2014Based in Allentown, PA, US· patent location history
2017Based in Port Allen, LA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| PARKER JAMES Cself | 10 | 2012–2014 |
| LSI CORP | 9 | 2012–2014 |
| RAO VISHWAS M | 9 | 2012–2014 |
| AGERE SYSTEMS INC | 4 | 2010–2014 |
| AGERE SYSTEMS LLC | 3 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Zionsville, Pennsylvania, US | 12 | 2011–2014 |
| Allentown, Pennsylvania, US | 3 | 2013–2014 |
| Pleasanton, California, US | 2 | 1997–2004 |
| Port Allen, LA, US | 1 | 2017 |
| Upper Milford Township, Lehigh County, Pennsylvania, US | 1 | 2010 |