Inventor
Philip A. Bourekas
Inventor
San Jose, CA, US
Overview
Patents· 13 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing86%
G01RMeasuring electric variables7%
G11CStatic stores7%
PatentTitleYear
7,133,951'Alternate set of registers to service critical interrupts and operating system traps'20066,598,050'Apparatus and method for limited data sharing in a multi-tasking system'20036,128,703'Method and apparatus for memory prefetch operation of volatile non-coherent data'20005,894,176'Flexible reset scheme supporting normal system operation, test and emulation modes'19995,694,567'Direct-mapped cache with cache locking allowing expanded contiguous memory storage by swapping one or more tag bits with one or more index bits'19975,649,232'Structure and method for multiple-level read buffer supporting optimal throttled read operations by regulating transfer rate'19975,636,363'Hardware control structure and method for off-chip monitoring entries of an on-chip cache'19975,553,268'Memory operations priority scheme for microprocessors'19965,517,659'Multiplexed status and diagnostic pins in a microprocessor with on-chip caches'19965,386,579'Minimum pin-count multiplexed address/data bus with byte enable and burst address counter support microprocessor transmitting byte enable signals on multiplexed address/data bus having burst address counter for supporting signal datum and burst transfer'19955,343,435'Use of a data register to effectively increase the efficiency of an on-chip write buffer'19945,317,711'Structure and method for monitoring an internal cache'19945,175,859'Apparatus for disabling unused cache tag input/output pins during processor reset by sensing pull-down resistors connected to disabled pins'1992Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1992–2003Patents assigned to INTEGRATED DEVICE TECH (12)· patent assignee history
1992Based in Sunnyvale, CA, US· patent location history
1994–2006Based in San Jose, CA, US· patent location history
2006Patents assigned to BOUREKAS PHILIP A (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEGRATED DEVICE TECH | 12 | 1992–2003 |
| BOUREKAS PHILIP Aself | 1 | 2006 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 12 | 1994–2006 |
| Sunnyvale, California, US | 1 | 1992 |