Inventor
William R. Hunter
Inventor
Garland, TX, US
Overview
Patents· 15 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
Y10Sprimary
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests27%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1024%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1015%
H10DInorganic electric semiconductor devices9%
G21KHandling of particles or ionising radiation not otherwise provided for6%
B82YSpecific uses or applications of nanostructures3%
E05BLocks3%
G01JMeasurement of intensity, velocity, spectral content, polarisation, phase or pulse characteristics of infrared, visible or ultraviolet light3%
G02BOptical elements, systems or apparatus3%
H01JElectric discharge tubes or discharge lamps3%
PatentTitleYear
7,031,163'Mechanical cooling fin for interconnects'20066,710,443'INTEGRATED CIRCUIT PROVIDING THERMALLY CONDUCTIVE STRUCTURES SUBSTANTIALLY HORIZONTALLY COUPLED TO ONE ANOTHER WITHIN ONE OR MORE HEAT DISSIPATION LAYERS TO DISSIPATE HEAT FROM A HEAT GENERATING STRUCTURE'20045,604,629'Discrete vacuum ultra violet reflective interference filter'19975,311,098'Interference photocathode'19945,307,395'Low-damage multilayer mirror for the soft X-ray region'19944,983,226'Defect free trench isolation devices and method of fabrication'19914,631,803'Method of fabricating defect free trench isolation devices'19864,580,330'Integrated circuit isolation'19864,538,343'Channel stop isolation technology utilizing two-step etching and selective oxidation with sidewall masking'19854,462,689'Wide band scanning monochromator'19844,356,623'Fabrication of submicron semiconductor devices'19824,354,896'Formation of submicron substrate element'19824,331,708'Method of fabricating narrow deep grooves in silicon'19824,300,374'Key retaining cylinder for a lock'19814,098,618'Method of manufacturing semiconductor devices in which oxide regions are formed by an oxidation mask disposed directly on a substrate damaged by ion implantation'1978Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1978Patents assigned to IBM (1)· patent assignee history
1978Based in Ossining, NY, US· patent location history
1981Patents assigned to TRE CORP (1)· patent assignee history
1981Based in Los Angeles, CA, US· patent location history
1982–2006Patents assigned to TEXAS INSTRUMENTS INC (9)· patent assignee history
1982–1991Based in Garland, TX, US· patent location history
1984Patents assigned to BAKER MFG CO (1)· patent assignee history
1984–1997Based in Springfield, VA, US· patent location history
1994–1997Patents assigned to US ARMY (3)· patent assignee history
2004–2006Based in Richardson, TX, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TEXAS INSTRUMENTS INC | 9 | 1982–2006 |
| US ARMY | 3 | 1994–1997 |
| BAKER MFG CO | 1 | 1984 |
| IBM | 1 | 1978 |
| TRE CORP | 1 | 1981 |
Locations
| Location | Patents | Span |
|---|---|---|
| Garland, Texas, US | 7 | 1982–1991 |
| Springfield, Virginia, US | 4 | 1984–1997 |
| Richardson, Texas, US | 2 | 2004–2006 |
| Los Angeles, California, US | 1 | 1981 |
| Ossining, New York, US | 1 | 1978 |