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Inventor

Hiromitsu Maeda

Inventor
Yamato, JP

Overview

4→
Patents
1990–2004
Patent span
Physics
Primary field (CPC G)

Patents· 4 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing60%
H04LTransmission of digital information, e.g. telegraphic communication20%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests20%
PatentTitleYear
6,757,788'CACHE COHERENT CONTROL SYSTEM FOR NETWORK NODES ALLOWS CPU OR I/O DEVICE TO ACCESS TARGET BLOCK WITHOUT CACHE COHERENCE CONTROL, IF ASSOCIATED NODE HAS ACCESS RIGHT IN AN ACCESS RIGHT MEMORY TO TARGET BLOCK'20046,424,870'Parallel processor'20026,298,355'Computer system'20014,933,893'Arithmetic processing method and apparatus for performing arithmetic or logical operations within a minimum number of operation cycles'1990

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1990–2004Patents assigned to HITACHI LTD (4)· patent assignee history
1990Based in Kokubunji, JP· patent location history
2001–2002Based in Yamato, JP· patent location history
2004Based in Yokohama, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
HITACHI LTD41990–2004
Locations
LocationPatentsSpan
Yamato, JP22001–2002
Yokohama, JP12004
Kokubunji, JP11990