Inventor
Jhy-Jyi Sze
Inventor
Hsinchu, TW
Overview
Patents· 82 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Fprimary
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation31%
H01LSemiconductor devices26%
H10DInorganic electric semiconductor devices14%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1010%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
H04NPictorial communication, e.g. television6%
H10BElectronic memory devices3%
G02BOptical elements, systems or apparatus1%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution1%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests1%
PatentTitleYear
11,004,880Semiconductor imaging device having improved dark current performance202111,004,887Semiconductor image sensor202110,991,746High performance image sensor202110,985,201Image sensor including silicon over germanium layer202110,943,940Image sensor comprising reflective guide layer and method of forming the same202110,944,927Semiconductor structure and operating method for improving charge transfer of image sensor device202110,868,071Method for forming semiconductor image sensor202010,797,091Semiconductor imaging device having improved dark current performance202010,790,326Pixel device on deep trench isolation (DTI) structure for image sensor202010,692,914Implant damage free image sensor and method of the same202010,672,934SPAD image sensor and associated fabricating method202010,515,990Semiconductor devices having reduced noise201910,510,795Semiconductor image sensor201910,510,797Semiconductor image sensor201910,510,789Extra doped region for back-side deep trench isolation201910,367,023Semiconductor image sensor201910,276,618Extra doped region for back-side deep trench isolation201910,269,857Image sensor comprising reflective guide layer and method of forming the same201910,269,858Image sensor with reduced optical path201910,177,187Implant damage free image sensor and method of the same201910,165,208Method for reducing blooming in image sensor during idle period201810,157,942Semiconductor devices having reduced noise201810,128,293Self-aligned back side deep trench isolation structure201810,121,821Biased backside illuminated sensor shield structure201810,103,287Semiconductor arrangement and formation thereof20189,985,070Active pixel sensor having a raised source/drain20189,978,791Image sensor and method for manufacturing the same20189,954,022Extra doped region for back-side deep trench isolation20189,929,198'Infrared image sensor'20189,917,130'Image sensor with reduced optical path'20189,887,234'CMOS image sensor and method for forming the same'20189,859,326'Semiconductor devices, image sensors, and methods of manufacture thereof'20189,860,469'Pixel unit cell having conversion circuit'20189,859,325'Complementary metal-oxide-semiconductor (CMOS) image sensor with silicon and silicon germanium'20189,818,788'Vertical transfer gate structure for a back-side illumination (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor using global shutter capture'20179,768,218'Self-aligned back side deep trench isolation structure'20179,711,548'Methods of manufacturing semiconductor devices'20179,698,190'Image sensor comprising reflective guide layer and method of forming the same'20179,614,000'Biased backside illuminated sensor shield structure'20179,560,301'Pixel unit cell having conversion circuit'20179,536,915'Image sensor with embedded infrared filter layer'20179,515,116'Vertical transfer gate structure for a back-side illumination (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor using global shutter capture'20169,478,630'Fully isolated LIGBT and methods for forming the same'20169,425,343'Mechanisms for forming image sensor device'20169,425,228'Image sensor with reduced optical path'20169,397,135'Active pixel sensor having a raised source/drain'20169,374,538'Image sensor with embedded infrared filter layer'20169,349,769'Image sensor comprising reflective guide layer and method of forming the same'20169,349,768'CMOS image sensor with epitaxial passivation layer'20169,331,032'Hybrid bonding and apparatus for performing the same'20169,324,833'Methods of manufacturing semiconductor devices'20169,287,313'Active pixel sensor having a raised source/drain'20169,270,908'Image sensor configured to reduce blooming during idle period'20168,994,082'Transistors, methods of manufacturing thereof, and image sensor circuits with reduced RTS noise'20158,928,032'Fully isolated LIGBT and methods for forming the same'20158,878,601'Power supply circuit with positive and negative feedback loops'20148,759,225'Method to form a CMOS image sensor'20148,735,937'Fully isolated LIGBT and methods for forming the same'20148,159,557'Method of generating a gain of an image frame'20128,009,212'Image processing system with a 4-T pixel and method thereof capable of reducing fixed pattern noise'20117,863,082'Photo diode and related method for fabrication'20117,776,676'Fabricating method of complementary metal-oxide-semiconductor (CMOS) image sensor including p type gate structure'20107,737,479'Image sensor'20107,586,138'Image sensor and method of forming the same'20097,564,083'Active pixel sensor'20097,547,573'Image sensor and method of manufacturing the same'20097,518,171'Photo diode and related method for fabrication'20097,371,599'Image sensor and method of forming the same'20087,321,141'Image sensor device and manufacturing method thereof'20087,008,815'Method of manufacturing a self-aligned guard ring of a photo diode'20066,297,123'Method of preventing neck oxidation of a storage node'20016,291,330'Method of fabricating gate structure to reduce stress production'20016,291,338'Method of fabricating self-aligned polysilicon via plug'20016,235,595'Method of fabricating metal oxide semiconductor'20016,190,956'Forming a capacitor structure of a semiconductor'20016,187,629'Method of fabricating a DRAM capacitor'20016,187,626'Forming a semi-recessed capacitor structure in an inter-polysilicon dielectric'20016,130,121'Method for fabricating a transistor'20006,080,633'Method for manufacturing capacitor\'s lower electrode'20006,060,367'Method of forming capacitors'20005,972,764'Method for manufacturing MOS transistor'19995,933,728'Process for fabricating bottom electrode of capacitor'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2001Patents assigned to UNITED SEMICONDUCTOR CORP (5)· patent assignee history
1999–2012Based in Tainan, TW· patent location history
2001–2012Patents assigned to UNITED MICROELECTRONICS CORP (17)· patent assignee history
2010–2021Based in Hsinchu, TW· patent location history
2012–2015Patents assigned to SZE JHY-JYI (5)· patent assignee history
2014–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (10)· patent assignee history
2016–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (48)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 48 | 2016–2021 |
| UNITED MICROELECTRONICS CORP | 17 | 2001–2012 |
| TAIWAN SEMICONDUCTOR MFG | 10 | 2014–2016 |
| SZE JHY-JYIself | 5 | 2012–2015 |
| UNITED SEMICONDUCTOR CORP | 5 | 1999–2001 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 59 | 2010–2021 |
| Tainan, TW | 23 | 1999–2012 |