Inventor
Pamela Castalino
Inventor
Hopewell Junction, NY, US
Overview
Patents· 4 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing50%
G11CStatic stores50%
PatentTitleYear
9,355,739'Bitline circuits for embedded charge trap multi-time-programmable-read-only-memory'20169,230,637'SRAM circuit with increased write margin'20168,606,556'Circuit-level validation of computer executable device/circuit simulators'20138,515,715'Method, system and program storage device for simulating electronic device performance as a function of process variations'2013Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2013Patents assigned to CASTALINO PAMELA (2)· patent assignee history
2013Patents assigned to IBM (2)· patent assignee history
2013Patents assigned to BANSAL ADITYA (1)· patent assignee history
2013Patents assigned to LEA DALLAS M (1)· patent assignee history
2013–2016Based in Hopewell Junction, NY, US· patent location history
2016Patents assigned to GLOBALFOUNDRIES INC (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| CASTALINO PAMELAself | 2 | 2013 |
| GLOBALFOUNDRIES INC | 2 | 2016 |
| IBM | 2 | 2013 |
| BANSAL ADITYA | 1 | 2013 |
| LEA DALLAS M | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hopewell Junction, New York, US | 4 | 2013–2016 |