LexDanaLexDanabeta
Inventor

Po-Chun Liu

Inventor
Hsinchu, TW

Overview

52→
Patents
2006–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 52 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices27%
H01LSemiconductor devices23%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1022%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
H10HInorganic light-emitting semiconductor devices having potential barriers7%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation3%
C30BSingle-crystal growth3%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution1%
Y10TTechnical subjects covered by former us classification1%
B82YSpecific uses or applications of nanostructures1%
PatentTitleYear
11,133,774Solar tracking sensor based on fiber light guidance202110,867,792High electron mobility transistor (HEMT) having an indium-containing layer and method of manufacturing the same202010,861,896Capping structure to reduce dark current in image sensors202010,804,101Semiconductor structure having sets of III-V compound layers and method of forming202010,755,936Loading effect reduction through multiple coat-etch processes202010,483,386Semiconductor device, transistor having doped seed layer and method of manufacturing the same2019D0847958Toilet201910,276,392Loading effect reduction through multiple coat-etch processes201910,147,829Dielectric sidewall structure for quality improvement in Ge and SiGe devices201810,109,729High electron mobility transistors201810,109,736Superlattice buffer structure for gallium nitride transistors201810,079,296High electron mobility transistor with indium nitride layer201810,074,537Method of forming semiconductor structure having sets of III-V compound layers20189,899,493'High electron mobility transistor and method of forming the same'20189,711,604'Loading effect reduction through multiple coat-etch processes'20179,660,063'Semiconductor structure having sets of III-V compound layers and method of forming the same'20179,620,362'Seed layer structure for growth of III-V materials on silicon'20179,548,376'Method of manufacturing a semiconductor device including a barrier structure'20179,525,054'High electron mobility transistor and method of forming the same'20169,478,632'Method of manufacturing a semiconductor device'20169,455,341'Transistor having a back-barrier layer and method of making the same'20169,425,276'High electron mobility transistors'20169,368,610'High electron mobility transistor with indium nitride layer'20169,245,991'Semiconductor device, high electron mobility transistor (HEMT) and method of manufacturing'20169,236,465'High electron mobility transistor and method of forming the same'20169,233,844'Graded aluminum—gallium—nitride and superlattice buffer layer for III-V nitride layer on silicon substrate'20169,236,464'Method of forming a high electron mobility transistor'20169,224,847'High electron mobility transistor and method of forming the same'20159,202,875'High electron mobility transistor with indium nitride layer'20159,142,407'Semiconductor structure having sets of III-V compound layers and method of forming the same'20159,093,511'Transistor having high breakdown voltage and method of making the same'20159,076,854'Semiconductor device'20158,975,641'Transistor having an ohmic contact by gradient layer and method of making the same'20158,969,882'Transistor having an ohmic contact by screen layer and method of making the same'20158,912,570'High electron mobility transistor and method of forming the same'20148,901,609'Transistor having doped substrate and method of making the same'20148,895,992'High electron mobility transistor and method of forming the same'20148,866,192'Semiconductor device, high electron mobility transistor (HEMT) and method of manufacturing'20148,809,910'Thick AlN inter-layer for III-nitride layer on silicon substrate'20148,803,158'High electron mobility transistor and method of forming the same'20148,791,504'Substrate breakdown voltage improvement for group III-nitride on a silicon substrate'20148,772,831'III-nitride growth method on silicon substrate'20148,648,387'Nitride semiconductor template and method of manufacturing the same'20148,647,901'Method for forming a nitride semiconductor layer and method for separating the nitride semiconductor layer from the substrate'20148,502,190'Device of light-emitting diode'20138,221,547'Nitride semiconductor substrate and method for forming the same'20128,093,081'Device of light-emitting diode and method for fabricating the same'20128,058,705'Composite material substrate'20117,868,346'Island submount and a method thereof'20117,772,595'Nitride semiconductor substrate, method for forming a nitride semiconductor layer and method for separating the nitride semiconductor layer from the substrate'20107,687,378'Fabricating method of nitride semiconductor substrate and composite material substrate'20107,095,765'Light emitter with a voltage dependent resistor layer'2006

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2006–2020Based in Hsinchu, TW· patent location history
2010–2014Patents assigned to IND TECH RES INST (9)· patent assignee history
2010–2014Based in Taichung, TW· patent location history
2011–2016Patents assigned to LIU PO-CHUN (11)· patent assignee history
2014–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (19)· patent assignee history
2014–2016Patents assigned to CHEN CHI-MING (5)· patent assignee history
2016–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (21)· patent assignee history
2017–2020Based in New Taipei, TW· patent location history
2019Based in Taipei, TW· patent location history
2021Based in Jiangsu, CN· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG CO LTD212016–2020
TAIWAN SEMICONDUCTOR MFG192014–2016
LIU PO-CHUNself112011–2016
IND TECH RES INST92010–2014
CHEN CHI-MING52014–2016
Locations
LocationPatentsSpan
Hsinchu, TW392006–2020
Taichung, TW72010–2014
New Taipei, TW32017–2020
Jiangsu, CN12021
Taipei, TW12019