Inventor

Gregory S. Spencer

Inventor
Pflugerville, TX, US

Overview

20→
Patents
2005–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 20 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices26%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1024%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1017%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation7%
G02BOptical elements, systems or apparatus4%
G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes4%
H01LSemiconductor devices4%
A47CChairs2%
B60NSeats specially adapted for vehicles2%
B60RVehicles, vehicle fittings, or vehicle parts, not otherwise provided for2%
PatentTitleYear
10,769,724Vehicle loan generation system: multiple vehicle loan offer generation202010,625,650Armrest assembly with in-arm cup holder202010,163,156Vehicle loan generation system: prequalified vehicle loan offer generation20189,209,078'Method of making a die with recessed aluminum die pads'20158,722,530'Method of making a die with recessed aluminum die pads'20148,242,564'Semiconductor device with photonics'20128,093,084'Semiconductor device with photonics'20127,911,002'Semiconductor device with selectively modulated gate work function'20117,871,854'Method of making a vertical photodetector'20117,846,803'Multiple millisecond anneals for semiconductor device fabrication'20107,790,528'Dual substrate orientation or bulk on SOI integrations using oxidation for silicon epitaxy spacer formation'20107,754,587'Silicon deposition over dual surface orientation substrates to promote uniform polishing'20107,749,829'Step height reduction between SOI and EPI for DSO and BOS integration'20107,659,156'Method to selectively modulate gate work function through selective Ge condensation and high-K dielectric layer'20107,575,968'Inverse slope isolation and dual surface orientation integration'20097,479,465'Transfer of stress to a layer'20097,416,605'Anneal of epitaxial layer in a semiconductor device'20087,378,306'Selective silicon deposition for planarized dual surface orientation integration'20086,992,003'Integration of ultra low K dielectric in a semiconductor fabrication process'20066,903,004'Method of making a semiconductor device having a low K dielectric'2005

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2005–2015Patents assigned to FREESCALE SEMICONDUCTOR INC (17)· patent assignee history
2005–2014Based in Pflugerville, TX, US· patent location history
2012–2015Patents assigned to SPENCER GREGORY S (4)· patent assignee history
2012Patents assigned to HILDRETH JILL C (2)· patent assignee history
2012Patents assigned to JONES ROBERT E (2)· patent assignee history
2014–2015Patents assigned to DENNING DEAN J (2)· patent assignee history
2015Based in Hutto, TX, US· patent location history
2018–2020Based in Hudson, IL, US· patent location history
2020Based in Winston-Salem, NC, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
FREESCALE SEMICONDUCTOR INC172005–2015
SPENCER GREGORY Sself42012–2015
DENNING DEAN J22014–2015
HILDRETH JILL C22012
JONES ROBERT E22012
Locations
LocationPatentsSpan
Pflugerville, Texas, US162005–2014
Hudson, Illinois, US22018–2020
Winston-Salem, NC, US12020
Hutto, Texas, US12015